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arxiv: 2604.17218 · v1 · submitted 2026-04-19 · ⚛️ physics.ins-det · hep-ex

Recognition: unknown

AURORA: A High Performance DAQ Framework for Next-Generation Rare-Event Search Experiments

Yihan Guo , Xiaofeng Shang , Chang Cai , Weihao Wu , Xun Chen
Authors on Pith no claims yet

Pith reviewed 2026-05-10 05:53 UTC · model grok-4.3

classification ⚛️ physics.ins-det hep-ex
keywords data acquisitionDAQ frameworkrare-event searchhigh-throughputPandaX-xTmodular architectureasynchronous processingphysics instrumentation
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The pith

The AURORA framework achieves over 3 GB/s throughput on aggregation nodes to meet the 1.6 GB/s data demands of experiments with more than 3,000 high-speed channels.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper presents AURORA as a distributed data acquisition system built for next-generation rare-event searches that produce large data volumes from thousands of readout channels. It reports benchmark results showing the aggregation node can handle more than 3 GB/s, which exceeds the sustained 1.6 GB/s bandwidth needed by PandaX-xT with over 3,000 channels sampling at 500 MSa/s. The design uses a modular structure along with multi-level buffering and deferred asynchronous processing to maintain low latency and efficient resource use. This performance level matters because detectors in these experiments would otherwise lose data or require impractical hardware scaling. The framework is described as adaptable to other large-scale particle and nuclear physics setups.

Core claim

AURORA is a high-performance, distributed data acquisition framework designed for scalability, low latency, and efficient resource utilization. Built on a modular architecture and leveraging modern I/O and networking technologies including multi-level buffering and deferred and asynchronous processing, AURORA achieves a projected throughput of over 3 GB/s on the aggregation node in benchmark tests while supporting the 1.6 GB/s sustained bandwidth required by PandaX-xT with over 3,000 channels at 500 MSa/s. While developed to support PandaX-xT, the framework is experiment-agnostic and readily adaptable to other large-scale particle and nuclear physics experiments.

What carries the argument

Modular architecture with multi-level buffering and deferred asynchronous processing that aggregates and manages high-volume data streams from many channels.

If this is right

  • PandaX-xT can run at its full required data rate of 1.6 GB/s without loss from the more than 3,000 channels.
  • The same framework can be adapted for other experiments that need similar high-channel-count, high-sampling-rate data handling.
  • Future detectors with even larger numbers of channels or higher sampling rates become feasible without redesigning the core acquisition layer.
  • Deferred and asynchronous processing reduces the hardware resources needed to maintain low-latency operation.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • If the buffering approach scales, experiments could increase detector granularity without being limited by data throughput.
  • Similar modular buffering patterns might apply to high-speed data collection in adjacent fields such as neutrino telescopes or medical imaging arrays.
  • Integration testing across varied network topologies would clarify whether the reported headroom remains available in distributed real-time settings.

Load-bearing premise

The benchmark tests and modular architecture with multi-level buffering and deferred processing will translate directly to sustained performance under real experimental conditions without hidden bottlenecks or integration issues.

What would settle it

If actual deployment on PandaX-xT shows sustained bandwidth dropping below 1.6 GB/s or aggregation-node throughput falling below 3 GB/s under full channel load, the performance claims would not hold.

Figures

Figures reproduced from arXiv: 2604.17218 by Chang Cai, Weihao Wu, Xiaofeng Shang, Xun Chen, Yihan Guo.

Figure 1
Figure 1. Figure 1: Schematic overview of the distributed DAQ architecture. For clarity, only one representative PMT, digitizer, [PITH_FULL_IMAGE:figures/full_fig_p004_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Structure of the raw data block. Each successful read operation via the digitizer library produces a data packet containing an integer number of complete data blocks. Blocks from all channels within the same data stream must be stored in chronological order, sorted by their embedded timestamp. Thus, the daq_reader must transfer data packets to the collector without loss, while the collector is re￾sponsible… view at source ↗
Figure 4
Figure 4. Figure 4: The core component is the DAQManager, which controls the entire application lifecycle. Several major components operate under its supervision, all implemented as custom C++ classes. The Digitizer class provides a software abstraction of a physical digitizer board. It integrates methods for configuration, start, and stop of data acquisition, and manages basic hardware pa￾rameters such as the digitizer name … view at source ↗
Figure 3
Figure 3. Figure 3: The flow of a data acquisition cycle and command history. The state change of the collector is shown. [PITH_FULL_IMAGE:figures/full_fig_p007_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: Architecture of the daq_reader program. Following successful initialization, other control commands can be propagated to all man￾aged digitizers. For data acquisition, the DigitizerManager launches one acquisition thread for every digitizer. The acquired data blocks are temporarily stored in a ring buffer. For data transmission, each data session posts asynchronous send operations. These opera￾tions are se… view at source ↗
Figure 5
Figure 5. Figure 5: The architecture of the collector program. [PITH_FULL_IMAGE:figures/full_fig_p009_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: An example illustrating how data blocks from a packet are distributed into their corresponding timed bu [PITH_FULL_IMAGE:figures/full_fig_p010_6.png] view at source ↗
read the original abstract

The upcoming PandaX-xT experiment will deploy over 3,000 readout channels operating at a 500 MSa/s sampling rate, generating a sustained data bandwidth up to 1.6 GB/s. To meet this demanding requirement, we present AURORA, a high-performance, distributed data acquisition (DAQ) framework designed for scalability, low latency, and efficient resource utilization. Built on a modular architecture and leveraging modern I/O and networking technologies, including multi-level buffering, deferred and asynchronous processing, AURORA achieves a projected throughput of over 3 GB/s on the aggregation node in benchmark tests. While developed to support PandaX-xT, the framework is experiment-agnostic and readily adaptable to other large-scale particle and nuclear physics experiments.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

3 major / 2 minor

Summary. The paper presents AURORA, a modular, distributed DAQ framework for next-generation rare-event searches. It targets the PandaX-xT experiment's requirements of >3000 readout channels at 500 MSa/s, producing up to 1.6 GB/s sustained bandwidth. The framework employs multi-level buffering, deferred/asynchronous processing, and modern I/O/networking technologies. Benchmark tests on the aggregation node are reported to project a throughput exceeding 3 GB/s, with the system described as scalable and experiment-agnostic for adaptation to other large-scale particle and nuclear physics experiments.

Significance. If the benchmark projections translate to sustained performance under full experimental load, AURORA would offer a practical, high-throughput DAQ solution that addresses a key bottleneck for upcoming ton-scale and multi-ton rare-event detectors. The modular design and emphasis on asynchronous processing could reduce development overhead for future experiments facing similar data-rate challenges.

major comments (3)
  1. [§4 (Performance Evaluation)] §4 (Performance Evaluation): The central claim that AURORA supports the 1.6 GB/s PandaX-xT requirement rests on benchmark results projecting >3 GB/s throughput, yet these tests provide no error bars, detailed test conditions, data exclusion criteria, or explicit comparison baselines, leaving the quantitative support for the projection thin.
  2. [§3 (Architecture) and §4] §3 (Architecture) and §4: The multi-level buffering and deferred/asynchronous processing are described as enabling scalability, but no quantitative scaling measurements or simulations are presented that inject realistic per-channel data volumes, packetization overhead, or timing jitter from >3000 front-end channels at 500 MSa/s; this leaves unverified whether contention is eliminated at full fan-in.
  3. [§4.1 (Benchmark Setup)] §4.1 (Benchmark Setup): The aggregation-node benchmarks do not report tests under the full 3000-channel load with realistic data patterns expected from the front-end electronics, so the assumption that the architecture sustains the required bandwidth without hidden bottlenecks remains untested.
minor comments (2)
  1. [Abstract and §1] The abstract and §1 state the 1.6 GB/s figure without an explicit derivation or reference to the per-channel bit depth and compression assumptions used to arrive at it.
  2. [Performance figures] Figure captions in the performance section could more clearly indicate whether the reported throughputs include or exclude overhead from packetization and network protocols.

Simulated Author's Rebuttal

3 responses · 0 unresolved

We thank the referee for their constructive and detailed review of our manuscript on the AURORA DAQ framework. We address each major comment point by point below, providing clarifications where possible and indicating planned revisions to improve the quantitative support and transparency of the results.

read point-by-point responses

  1. Referee: §4 (Performance Evaluation): The central claim that AURORA supports the 1.6 GB/s PandaX-xT requirement rests on benchmark results projecting >3 GB/s throughput, yet these tests provide no error bars, detailed test conditions, data exclusion criteria, or explicit comparison baselines, leaving the quantitative support for the projection thin.

    Authors: We acknowledge that the benchmark results presented in Section 4 would benefit from greater statistical rigor and context. In the revised manuscript, we will add error bars calculated from multiple independent runs of the benchmarks, expand the description of test conditions (including specific hardware, network configuration, and data generation methodology), clarify any data exclusion criteria, and include explicit baseline comparisons to standard I/O benchmarks or prior DAQ implementations. These changes will provide stronger quantitative backing for the >3 GB/s projection. revision: yes

  2. Referee: §3 (Architecture) and §4: The multi-level buffering and deferred/asynchronous processing are described as enabling scalability, but no quantitative scaling measurements or simulations are presented that inject realistic per-channel data volumes, packetization overhead, or timing jitter from >3000 front-end channels at 500 MSa/s; this leaves unverified whether contention is eliminated at full fan-in.

    Authors: The current manuscript focuses on the core architectural mechanisms and node-level benchmarks to demonstrate scalability potential. We agree that explicit scaling measurements or simulations incorporating per-channel volumes, packetization, and jitter would strengthen the claims. In the revision, we will add modeling results or additional analysis in Sections 3 and 4 that simulate the full fan-in scenario based on the expected 500 MSa/s rates and data patterns, showing how the buffering and asynchronous design mitigates contention. This will be supported by calculations derived from the existing benchmark data. revision: partial

  3. Referee: §4.1 (Benchmark Setup): The aggregation-node benchmarks do not report tests under the full 3000-channel load with realistic data patterns expected from the front-end electronics, so the assumption that the architecture sustains the required bandwidth without hidden bottlenecks remains untested.

    Authors: The aggregation-node benchmarks were conducted at sustained rates exceeding the 1.6 GB/s target using synthetic workloads calibrated to match the expected aggregate bandwidth from 3000+ channels. We recognize that explicit full-scale tests with 3000-channel hardware and precise front-end data patterns are not yet reported. In the revised Section 4.1, we will provide more detailed justification of the data patterns used (including how they emulate per-channel 500 MSa/s streams), discuss potential bottlenecks, and note that complete 3000-channel integration tests will be performed as PandaX-xT hardware becomes available. The modular design and current results support the projection in the interim. revision: partial

Circularity Check

0 steps flagged

No circularity: throughput claims rest on external benchmark measurements, not self-referential derivation

full rationale

The paper describes a modular DAQ architecture with multi-level buffering and reports benchmark-derived throughput figures (>3 GB/s on aggregation node) that are compared against the PandaX-xT requirement (1.6 GB/s). No equations, fitted parameters, or derivation steps are present that reduce the performance projection to its own inputs by construction. No self-citations, uniqueness theorems, or ansatzes are invoked as load-bearing premises. The central claims are engineering assertions backed by separate test results rather than circular redefinitions or renamings of known patterns. This is a standard non-circular case of an implementation paper whose quantitative results are tied to external measurements.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

The central claim rests on standard assumptions about hardware and software performance rather than new physical laws or fitted constants. No free parameters or invented entities are introduced.

axioms (1)
  • domain assumption Benchmark tests on the aggregation node accurately predict sustained performance under full experimental load.
    The 3 GB/s projection is stated as achieved in benchmarks without further qualification on how well they match real detector conditions.

pith-pipeline@v0.9.0 · 5436 in / 1317 out tokens · 70663 ms · 2026-05-10T05:53:36.609114+00:00 · methodology

discussion (0)

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Reference graph

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