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arxiv: 2605.04049 · v2 · submitted 2026-05-05 · 🪐 quant-ph

Recognition: 2 theorem links

FTPrimitiveBench: A Benchmark Suite For Logical Computation Under Hardware-Motivated and Biased Noise Models

Authors on Pith no claims yet

Pith reviewed 2026-05-08 18:36 UTC · model grok-4.3

classification 🪐 quant-ph
keywords fault-tolerant quantum computinglogical primitivesstructured noise modelssurface codelattice surgeryquantum error correctionbenchmarkingdecoder choice
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The pith

Structured noise causes logical quantum primitives to show distinct performance depending on the noise type, primitive, and decoder.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper introduces FTPrimitiveBench to evaluate core logical operations under noise models that include Pauli bias, measurement bias, and spatial or temporal non-uniformity instead of assuming uniform depolarizing noise. It provides generators for surface-code primitives such as logical memory, lattice surgery, transversal Hadamard, and phase gates, then simulates how these operations perform when the noise has realistic structure. A sympathetic reader would care because real hardware devices exhibit these heterogeneities, and uniform models may give misleading estimates of the resources needed for fault tolerance. The central finding is that the effects on logical error rates vary qualitatively with the specific combination of noise structure, primitive implementation, and choice of decoder.

Core claim

FTPrimitiveBench links custom or representative structured noise specifications to generators for surface-code Clifford primitives and shows through simulation that these noise families produce qualitatively different outcomes for logical memory, lattice surgery, transversal Hadamard, and phase gates. The outcomes are shaped by the interplay between the noise model, the primitive, and the decoder, extending conventional memory-only benchmarks to active logical computation and enabling hardware-aware co-design of fault-tolerant protocols.

What carries the argument

FTPrimitiveBench, a standardized suite that connects noise-model specifications to circuit generators for logical primitives so their interaction under biased or non-uniform noise can be simulated reproducibly.

If this is right

  • Memory-only benchmarks miss noise interactions that appear once active logical operations such as lattice surgery are included.
  • Decoder performance depends on the noise structure, so the same decoder can be optimal or suboptimal depending on the bias or non-uniformity present.
  • Hardware-aware co-design becomes feasible once noise models and primitive constructions are linked in a standardized way.
  • Comparative studies of different QEC protocols and decoders can be performed reproducibly by using the same noise-primitive interface.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Decoders could be selected or trained on the basis of the dominant noise bias measured for a given device or region.
  • Different logical primitives might be preferred in different parts of a chip to match local error distributions.
  • The same benchmarking approach could be applied to other error-correcting codes to identify which primitives benefit most from hardware-specific noise features.
  • Extending the generators to include more complex temporal correlations would allow tests of whether current findings hold for longer computations.

Load-bearing premise

The selected families of structured noise are representative enough of the main heterogeneities and correlations present in real quantum hardware for evaluating logical primitives.

What would settle it

Calibrate the benchmark's noise parameters from measurements on a physical device, run the simulated primitives, then compare the predicted logical error rates against the error rates measured when the same primitives are executed on that device.

Figures

Figures reproduced from arXiv: 2605.04049 by Adrian Harkness, Chenxu Liu, Rod Rofougaran, Samuel Stein, Sean Garner, Shuwen Kan, Ying Mao, Zefan Du.

Figure 1
Figure 1. Figure 1: Illustration of a surface-code logical qubit. Left: a distance-3 patch showing data qubits (white) and interleaved view at source ↗
Figure 2
Figure 2. Figure 2: (a, b): Spacetime structure of the logical memory primitive in the rotated surface code. A distance-(𝑑𝑋 , 𝑑𝑍 ) patch is transversally initialized in a logical eigenstate, undergoes 𝑡 rounds of stabilizer extraction (vertical axis), and is transversally measured in the same basis. Panel (a) shows a 𝑍¯-basis experiment with 𝑑𝑋 = 𝑑𝑍 = 3; panel (b) shows its 𝑋¯-basis counterpart. Blue and red data-qubit nodes … view at source ↗
Figure 3
Figure 3. Figure 3: (a) and (b): Spacetime structure of the lattice-surgery primitive. Two logical patches (pre-surgery columns) are temporarily merged for 𝑇merge rounds along an ancilla bridge of length 𝐿 to extract the joint logical parity (𝑀𝑋𝑋 or 𝑀𝑍𝑍 ), then split apart for 𝑇post post-surgery rounds. The merge–split bridge yields the characteristic “H-shaped” spacetime topology. (c) Logical phase-gate: one logical data pat… view at source ↗
Figure 4
Figure 4. Figure 4: Logical memory under uniform depolarizing ( view at source ↗
Figure 5
Figure 5. Figure 5: Relative Logical Error Rate (LER) for memory experiments comparing correlated PyMatching [ view at source ↗
Figure 6
Figure 6. Figure 6: Logical memory under measurement-biased noise, normalized to the uniform-depolarizing baseline. In each subfigure the view at source ↗
Figure 7
Figure 7. Figure 7: Logical memory under non-uniform noise, normalized to the uniform-depolarizing baseline on square patches in the view at source ↗
Figure 8
Figure 8. Figure 8: Logical Hadamard under uniform depolarizing and view at source ↗
Figure 9
Figure 9. Figure 9: Logical Hadamard under measurement-biased noise, normalized to the uniform-depolarizing baseline on square patches. The view at source ↗
Figure 10
Figure 10. Figure 10: Logical Hadamard under non-uniform noise, normalized to the uniform-depolarizing baseline on square patches in the view at source ↗
Figure 11
Figure 11. Figure 11: Effect of ancilla bridge length on lattice surgery under uniform depolarizing noise. Each panel shows the relative logical error view at source ↗
Figure 12
Figure 12. Figure 12: Logical lattice surgery (𝑀𝑍𝑍 ) under uniform depolarizing and 𝑍-biased noise for the single-ancilla construction. LER per round versus physical error rate; columns sweep 𝜂 ∈ {1, 10, 100} and rows increase patch asymmetry by enlarging 𝑑𝑍 . Under 𝑍 bias, rectangular patches with 𝑑𝑍 > 𝑑𝑋 reduce the logical error rate by up to an order of magnitude at 𝜂 = 100, and the geometry advantage appears at lower physi… view at source ↗
Figure 13
Figure 13. Figure 13: Absolute logical-lattice-surgery LER per round versus round count on square patches with merge distance equal to the round view at source ↗
Figure 14
Figure 14. Figure 14: Logical lattice surgery under measurement-biased noise, normalized to the uniform-depolarizing baseline on square patches. view at source ↗
Figure 15
Figure 15. Figure 15: Logical lattice surgery under non-uniform noise, normalized to the uniform-depolarizing baseline on square patches in the view at source ↗
Figure 16
Figure 16. Figure 16: Logical phase gate under measurement-biased noise: relative LER versus boundary-round count view at source ↗
Figure 17
Figure 17. Figure 17: Logical phase gate under measurement-biased noise: relative LER versus physical error rate at view at source ↗
Figure 18
Figure 18. Figure 18: Logical phase gate under non-uniform noise, normalized to the uniform-depolarizing baseline. Rows compare spatial-only view at source ↗
read the original abstract

Fault-tolerant quantum computing requires understanding how error-correcting codes perform on diverse physical hardware. This is typically assessed via noisy stabilizer simulation of logical circuits at HPC scale, combined with a noise model that yields a logical error rate for the relevant code distances and depths. The uniform depolarizing model is the standard baseline, but its homogeneous assumptions fail to capture the heterogeneity, asymmetries, and correlations of real devices, where Pauli, measurement, and spatio-temporal errors are not weakly coupled. Yet these same structured features create opportunities for joint code-hardware co-design, motivating noise models that more faithfully reflect target hardware while remaining tractable to simulate. We introduce FTPrimitiveBench, a systematic benchmarking approach for studying how logical primitives interact with hardware-motivated noise. It supports both custom specifications and representative structured noise families: Pauli bias, measurement bias, and spatial or spatio-temporal non-uniformity -- together with generators for core surface-code Clifford primitives: logical memory, lattice surgery, transversal logical Hadamard, and the logical phase gate via lattice surgery. We find that structured noise affects these primitives in qualitatively distinct ways, with outcomes shaped by the interplay between noise model, primitive, and decoder choice. These results extend memory benchmarks to active logical computation, where the interaction between noise structure and primitive implementation matters. By standardizing the link between noise-model specification and primitive construction, FTPrimitiveBench enables reproducible comparative studies of QEC protocols and decoders, supporting hardware-aware co-design of fault-tolerant architectures. Code: https://github.com/ShuwenKan/FTPrimitiveBench.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

0 major / 3 minor

Summary. The manuscript introduces FTPrimitiveBench, a benchmark suite for studying logical primitives (logical memory, lattice surgery, transversal logical Hadamard, and logical phase gate via lattice surgery) under hardware-motivated structured noise models, specifically Pauli bias, measurement bias, and spatial or spatio-temporal non-uniformity. It supplies generators for both the primitives and the noise families, performs noisy stabilizer simulations, and reports qualitative findings that structured noise affects the primitives in distinct ways shaped by the interplay of noise model, primitive implementation, and decoder choice. The work positions this as an extension of memory-only benchmarks to active logical computation and emphasizes standardization and reproducibility via open code.

Significance. If the reported qualitative distinctions hold under the supplied noise families, the benchmark offers a practical, standardized tool for evaluating how realistic noise heterogeneities interact with fault-tolerant primitives, supporting hardware-aware co-design of QEC protocols and decoders. A clear strength is the provision of open code for primitive generators and noise models, which makes the central empirical observations directly reproducible without hidden parameters or circular self-references.

minor comments (3)
  1. Abstract: the phrase 'qualitative findings from simulations' would benefit from a single sentence specifying the code distances, depths, and number of shots used, to give readers an immediate sense of the simulation scale.
  2. Section on noise models (likely §3 or §4): the description of how spatial and spatio-temporal non-uniformity is implemented could include a brief pseudocode snippet or explicit probability map example for one primitive, to aid immediate reproducibility.
  3. Results section: while the qualitative distinctions are the main claim, adding a small table summarizing the relative ordering of logical error rates across the four primitives for each noise family would make the interplay easier to compare at a glance.

Simulated Author's Rebuttal

0 responses · 0 unresolved

We thank the referee for their positive assessment of FTPrimitiveBench, including recognition of its utility as a standardized, reproducible tool for evaluating logical primitives under hardware-motivated noise models, and for the recommendation to accept the manuscript.

Circularity Check

0 steps flagged

No significant circularity; empirical benchmark results are independent

full rationale

The paper introduces FTPrimitiveBench as a new simulation framework for logical primitives under structured noise models and reports qualitative distinctions observed when running those simulations. All central claims are direct outputs of the new benchmark executions rather than reductions of fitted parameters, self-defined quantities, or load-bearing self-citations. The provided open code allows independent reproduction of the reported interplay between noise families, primitives, and decoders. No derivation chain collapses by construction to the paper's own inputs.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

The paper introduces a benchmarking framework rather than new physical derivations; it relies on standard quantum simulation assumptions without introducing fitted parameters or new entities.

axioms (1)
  • domain assumption Noisy stabilizer simulation provides a faithful model for evaluating logical error rates of surface-code primitives under the specified noise families.
    The benchmark is built around this simulation approach to assess performance of memory, lattice surgery, and gates.

pith-pipeline@v0.9.0 · 5606 in / 1310 out tokens · 41175 ms · 2026-05-08T18:36:37.906999+00:00 · methodology

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Reference graph

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