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arxiv: 2606.06598 · v1 · pith:HFSBP5LMnew · submitted 2026-06-04 · 🪐 quant-ph

A superconducting surface-code processor with lattice-surgery logical operations

Yanzhe Wang , Fanhao Shen , Haipeng Xie , Aosai Zhang , Yu Gao , Chuanyu Zhang , Xuhao Zhu , Feitong Jin
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Yiren Zou Ning Wang Zhengyi Cui Zehang Bao Zitian Zhu Jiarun Zhong Gongyu Liu Jia-Nan Yang Yihang Han Yiyang He Jiayuan Shen Han Wang Jiahua Huang Xinrong Zhang Sailang Zhou Hang Dong Jinfeng Deng Yaozu Wu Zixuan Song Hekang Li Zhen Wang Chao Song Qiujiang Guo Pengfei Zhang H. Wang Ying Li
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Pith reviewed 2026-06-28 00:36 UTC · model grok-4.3

classification 🪐 quant-ph
keywords surface codelattice surgerylogical qubitssuperconducting processormagic state injectionfault toleranceDeutsch-Jozsa algorithmnon-Clifford gates
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The pith

Lattice surgery is realized between two distance-three surface-code logical qubits on a superconducting processor, enabling logical Bell states, a logical Deutsch-Jozsa algorithm, and non-Clifford rotations.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper reports the experimental implementation of lattice-surgery operations between a pair of distance-three surface-code logical qubits on a planar superconducting processor. The logical qubits show per-cycle error rates of 0.0365(2) and 0.0282(1) after leakage rejection during repeated syndrome extraction. The work prepares a logical Bell state with verified genuine entanglement, executes a two-qubit Deutsch-Jozsa algorithm at the logical level, and uses magic-state injection plus gate teleportation to perform continuous non-Clifford rotations about the logical X axis, reaching 0.943 fidelity for the R_X(π/4) gate conditioned on no detected errors. A sympathetic reader would care because these steps show surface-code fault tolerance moving from abstract possibility to concrete operations on existing superconducting hardware.

Core claim

The authors experimentally realize lattice-surgery operations between two distance-three surface-code logical qubits on a planar superconducting processor. During repeated syndrome extraction cycles the logical qubits exhibit per-cycle error rates of 0.0365(2) and 0.0282(1) after leakage events are rejected. By leveraging joint initialization and lattice splitting they deterministically prepare a logical Bell state and confirm genuine bipartite entanglement via error-corrected logical state fidelity. They further execute a two-qubit Deutsch-Jozsa algorithm at the logical level and implement magic-state injection and gate teleportation to realize continuous non-Clifford rotations about the lo

What carries the argument

Lattice surgery, the merging and splitting of surface-code patches to perform logical entangling operations and measurements between logical qubits.

If this is right

  • Logical Bell states can be prepared deterministically with verified genuine bipartite entanglement at the logical level.
  • A two-qubit algorithm can be executed entirely at the logical level inside a fault-tolerant framework.
  • Continuous non-Clifford rotations about the logical X axis become accessible through magic-state injection and gate teleportation.
  • Per-cycle logical error rates near 0.03 are achieved after leakage rejection during syndrome extraction.
  • Lattice surgery functions as a practical method for logical computation in near-term surface-code superconducting architectures.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same lattice-surgery protocol could be extended to entangle three or more logical qubits without requiring fundamentally new hardware.
  • Unconditioned error rates would need separate reporting to determine whether the conditioned fidelities translate to always-on operation.
  • Repeating the logical Deutsch-Jozsa experiment with larger code distances could test how the observed error rates scale with code size.
  • The achieved per-cycle rates suggest that modest reductions in physical leakage could bring the system closer to the surface-code threshold.

Load-bearing premise

That post-selection by rejecting leakage events and conditioning on the absence of detected errors does not introduce significant bias into the reported logical error rates and gate fidelities.

What would settle it

A measurement showing that the reported logical gate fidelity for R_X(π/4) falls below 0.9 when all runs are retained without leakage rejection or conditioning on detected errors.

Figures

Figures reproduced from arXiv: 2606.06598 by Aosai Zhang, Chao Song, Chuanyu Zhang, Fanhao Shen, Feitong Jin, Gongyu Liu, Haipeng Xie, Hang Dong, Han Wang, Hekang Li, H. Wang, Jiahua Huang, Jia-Nan Yang, Jiarun Zhong, Jiayuan Shen, Jinfeng Deng, Ning Wang, Pengfei Zhang, Qiujiang Guo, Sailang Zhou, Xinrong Zhang, Xuhao Zhu, Yanzhe Wang, Yaozu Wu, Yihang Han, Ying Li, Yiren Zou, Yiyang He, Yu Gao, Zehang Bao, Zhengyi Cui, Zhen Wang, Zitian Zhu, Zixuan Song.

Figure 1
Figure 1. Figure 1: FIG. 1 [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: FIG. 2 [PITH_FULL_IMAGE:figures/full_fig_p004_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: FIG. 3 [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: FIG. 4 [PITH_FULL_IMAGE:figures/full_fig_p006_4.png] view at source ↗
read the original abstract

Fault-tolerant logical operations are fundamental for scalable quantum computation. Here, we report the experimental realization of lattice-surgery operations between a pair of distance-three surface-code logical qubits on a planar superconducting processor. During repeated syndrome extraction cycles, the logical qubits exhibit per-cycle error rates of $0.0365(2)$ and $0.0282(1)$, respectively, after leakage events are rejected. By leveraging joint initialization and lattice splitting, we deterministically prepare a logical Bell state, confirming genuine bipartite entanglement via the error-corrected logical state fidelity. We further execute a two-qubit Deutsch-Jozsa algorithm at the logical level to demonstrate algorithmic utility in a fault-tolerant framework. Finally, to achieve universal control, we implement magic-state injection and gate teleportation to realize continuous non-Clifford rotations about the logical $X$ axis. For the logical $R_{X}(\pi/4)$ gate, we achieve a logical gate fidelity of $0.943_{-9}^{+10}$ conditioned on the absence of detected errors. These results establish lattice surgery as a practical and versatile paradigm for logical computation in near-term surface-code architectures, representing a critical milestone toward scalable fault-tolerant quantum advantage in superconducting circuits.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 0 minor

Summary. The manuscript reports an experimental demonstration of lattice-surgery operations between two distance-3 surface-code logical qubits on a superconducting processor. Key results include per-cycle logical error rates of 0.0365(2) and 0.0282(1) after leakage rejection, deterministic preparation of a logical Bell state with verified entanglement, execution of a logical Deutsch-Jozsa algorithm, and magic-state injection plus gate teleportation realizing a logical R_X(π/4) rotation with reported fidelity 0.943_{-9}^{+10} conditioned on the absence of detected errors.

Significance. If the post-selection does not introduce bias, the work provides a concrete experimental milestone for lattice-surgery-based logical operations and non-Clifford gates in superconducting surface codes, advancing the practical implementation of fault-tolerant primitives on near-term hardware.

major comments (2)
  1. [Abstract] Abstract (final paragraph): The headline logical gate fidelity of 0.943_{-9}^{+10} for the magic-state-injected R_X(π/4) is reported only after conditioning on the absence of detected errors (and after rejecting leakage events). No retained-shot fraction, no unconditional fidelity, and no model of undetected errors are provided, so it is impossible to assess whether the conditioning correlates with the logical outcome and inflates the quoted value.
  2. [Abstract] Abstract (penultimate paragraph): The per-cycle logical error rates 0.0365(2) and 0.0282(1) are stated only after leakage rejection. Without the fraction of shots retained or a comparison of error rates with versus without rejection, the fault-tolerance claims rest on an unquantified post-selection assumption that is load-bearing for the overall narrative of practical lattice surgery.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for their careful reading of the manuscript and for highlighting the need for greater transparency around post-selection in the abstract. We address each comment below and will revise the abstract accordingly.

read point-by-point responses

  1. Referee: [Abstract] Abstract (final paragraph): The headline logical gate fidelity of 0.943_{-9}^{+10} for the magic-state-injected R_X(π/4) is reported only after conditioning on the absence of detected errors (and after rejecting leakage events). No retained-shot fraction, no unconditional fidelity, and no model of undetected errors are provided, so it is impossible to assess whether the conditioning correlates with the logical outcome and inflates the quoted value.

    Authors: We agree that the abstract should explicitly state the retained-shot fraction and the nature of the conditioning so that readers can evaluate potential bias. In the revised version we will add the retained fraction (after leakage rejection and error detection) to the final paragraph of the abstract together with a short clause noting that the fidelity is conditioned on the absence of detected errors. The main text already reports the retained fraction and shows that the logical outcome is not correlated with the detection events beyond the expected heralding; we do not compute an unconditional fidelity because the experiment is designed to operate in the regime where detected errors are rejected, consistent with fault-tolerant operation. A full model of undetected errors lies outside the scope of the present work but is not required for the reported conditioned result. revision: yes

  2. Referee: [Abstract] Abstract (penultimate paragraph): The per-cycle logical error rates 0.0365(2) and 0.0282(1) are stated only after leakage rejection. Without the fraction of shots retained or a comparison of error rates with versus without rejection, the fault-tolerance claims rest on an unquantified post-selection assumption that is load-bearing for the overall narrative of practical lattice surgery.

    Authors: We accept that the abstract must quantify the post-selection. The revised abstract will include the fraction of shots retained after leakage rejection. The main text already provides both the retained fraction and a direct comparison of logical error rates with and without leakage rejection, demonstrating that the improvement is consistent with removal of leakage-induced errors rather than an artificial bias. These data support the fault-tolerance narrative while making the post-selection explicit. revision: yes

Circularity Check

0 steps flagged

No circularity: experimental reporting of measured fidelities and error rates

full rationale

The paper reports direct experimental outcomes from a superconducting processor, including per-cycle logical error rates after leakage rejection and a conditioned logical gate fidelity for R_X(π/4). No derivation chain, equations, or first-principles results are present that reduce any claimed quantity to a fitted parameter or self-citation by construction. The central results are raw measurements with statistical uncertainties; post-selection conditioning is an explicit experimental choice rather than a hidden definitional loop. This matches the default expectation of a non-circular experimental manuscript.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Experimental paper; central claims rest on hardware calibration, syndrome extraction implementation, and post-selection rules whose details are not visible in the abstract. No free parameters, axioms, or invented entities are extractable from the provided text.

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Forward citations

Cited by 1 Pith paper

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