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Combining quantum processors with real-time classical communication

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arxiv 2402.17833 v2 pith:3UQVFP2Y submitted 2024-02-27 quant-ph

classification quant-ph
keywords quantumconnectivityhardwarequbitsclassicalcomputersdynamicreal-time
verification ladder T0 review T1 audit T2 compute T3 formal
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Quantum computers process information with the laws of quantum mechanics. Current quantum hardware is noisy, can only store information for a short time, and is limited to a few quantum bits, i.e., qubits, typically arranged in a planar connectivity. However, many applications of quantum computing require more connectivity than the planar lattice offered by the hardware on more qubits than is available on a single quantum processing unit (QPU). Here we overcome these limitations with error mitigated dynamic circuits and circuit-cutting to create quantum states requiring a periodic connectivity employing up to 142 qubits spanning multiple QPUs connected in real-time with a classical link. In a dynamic circuit, quantum gates can be classically controlled by the outcomes of mid-circuit measurements within run-time, i.e., within a fraction of the coherence time of the qubits. Our real-time classical link allows us to apply a quantum gate on one QPU conditioned on the outcome of a measurement on another QPU which enables a modular scaling of quantum hardware. Furthermore, the error mitigated control-flow enhances qubit connectivity and the instruction set of the hardware thus increasing the versatility of our quantum computers. Dynamic circuits and quantum modularity are thus key to scale quantum computers and make them useful.

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Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. AC/DC: Automated Compilation for Dynamic Circuits

    quant-ph 2024-12 conditional novelty 6.0 of 10

    A numerical optimization framework automatically synthesizes dynamic quantum circuits for state and unitary preparation, achieving shallower circuits at the cost of extra ancillas and mid-circuit measurement errors.

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