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FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks

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arxiv 2506.12968 v1 pith:4QUZ5J2E submitted 2025-06-15 cs.AR

FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks

classification cs.AR
keywords datafpgaspaceapplicationsarchitectureco-processinginterfacesaccelerator
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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The advent of computationally demanding algorithms and high data rate instruments in new space applications pushes the space industry to explore disruptive solutions for on-board data processing. We examine heterogeneous computing architectures involving high-performance and low-power commercial SoCs. The current paper implements an FPGA with VPU co-processing architecture utilizing the CIF & LCD interfaces for I/O data transfers. A Kintex FPGA serves as our framing processor and heritage accelerator, while we offload novel DSP/AI functions to a Myriad2 VPU. We prototype our architecture in the lab to evaluate the interfaces, the FPGA resource utilization, the VPU computational throughput, as well as the entire data handling system's performance, via custom benchmarking.

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