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MLPerf Tiny Benchmark
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Advancements in ultra-low-power tiny machine learning (TinyML) systems promise to unlock an entirely new class of smart applications. However, continued progress is limited by the lack of a widely accepted and easily reproducible benchmark for these systems. To meet this need, we present MLPerf Tiny, the first industry-standard benchmark suite for ultra-low-power tiny machine learning systems. The benchmark suite is the collaborative effort of more than 50 organizations from industry and academia and reflects the needs of the community. MLPerf Tiny measures the accuracy, latency, and energy of machine learning inference to properly evaluate the tradeoffs between systems. Additionally, MLPerf Tiny implements a modular design that enables benchmark submitters to show the benefits of their product, regardless of where it falls on the ML deployment stack, in a fair and reproducible manner. The suite features four benchmarks: keyword spotting, visual wake words, image classification, and anomaly detection.
Forward citations
Cited by 8 Pith papers
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Ariel-ML: Computing Parallelization with Embedded Rust for Neural Networks on Heterogeneous Multi-core Microcontrollers
Ariel-ML combines the IREE compiler with a Rust operating system to give microcontrollers automatic multi-core parallel inference for TinyML, with a measured 1.5x speedup on a dual-core board.
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Tensor Program Optimization for the RISC-V Vector Extension Using Probabilistic Programs
Integrating RVV tensor intrinsics into TVM's MetaSchedule autotuner yields AI kernels that are 29-50% faster than hand-written muRISCV-NN and 35-46% faster than compiler autovectorization on tested RVV 1.0 hardware.
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Breaking TinyML: Why Quantized Neural Networks Need Domain-Specific Security Analysis
Surrogate extraction followed by FGSM/PGD reduces int-8 TinyML accuracy by up to 47% on CIFAR-10 with 50k queries, outperforming gray-box baselines and exposing hardware-specific QNN vulnerabilities.
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Hardware-efficient tractable probabilistic inference for TinyML Neurosymbolic AI applications
An nth-root compression framework for deterministic probabilistic circuits that enables low-precision inference on TinyML hardware, with reported resource and latency savings.
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ECGLight: Compute-Light Framework For Paper ECG Digitization and Myocardial Infarction Screening
An end-to-end YOLOv11-based pipeline digitizes paper ECG images into calibrated 12-lead signals on CPU-only hardware in under 30 seconds and classifies myocardial infarction with up to 95.5% accuracy on PTB-XL and 88....
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Flexible Vector Integration in Embedded RISC-V SoCs for End to End CNN Inference Acceleration
Using a Hwacha vector coprocessor, the authors report up to 9x faster image preprocessing and 3x faster fallback execution for YOLOv3 on a NVDLA-based RISC-V SoC, but they mislabel Hwacha as RISC-V Vector 1.0.
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Searching Neural Architectures for Sensor Nodes on IoT Gateways
GatewayNAS adapts the hardware-aware neural architecture search space to the time and energy budget of an IoT gateway, producing tiny CNNs for sensor nodes without cloud data transfer.
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Real-Time Performance Benchmarking of TinyML Models in Embedded Systems (PICO: Performance of Inference, CPU, and Operations)
Measured latency, CPU, memory, and confidence for three TensorFlow Lite models on BeagleBone AI64 and Raspberry Pi 4; the Raspberry Pi 4 was faster and more resource-efficient in every test.
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