REVIEW 5 minor 1 cited by
PDA Construction via Union of Cartesian Product Cache Configurations for Coded Caching
T0 review · 0 major / 5 minor · reviewed 2026-08-10 · deepseek-v4-flash
Pith's one-line read From one small base PDA, this paper builds a $\binom{m}{t}K_1^t$-user PDA with coded caching gain $\binom{m}{t}g_1^t$, subpacketization $\lambda^t(F_1/\lambda)^m$, and load $(S_1/F_1)^t$.
desk verdict New t-union construction over Cartesian product PDAs that checks out, with minor caveats about base-PDA assumptions and a long manual proof. read the letter →
The pith
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
The reading
What carries the argument
The load-bearing object is the 'base PDA' of Definition 3 together with the vector set $\mathcal{S}$ in equation (5). A base PDA is a $g_1$-regular PDA whose rows split into $\lambda$ identical-star subarrays (Condition C4) and whose broadcast symbols admit a uniform partition $B_1,\dots,B_{F_1/\lambda}$ into star rows (Condition C5), with $|B_j| = \lambda S_1/F_1$ for every $j$. Construction 1 takes the $m$-fold Cartesian product of the first subarray, copies it $\lambda^t$ times vertically, forms the union of $t$ cache configurations from $t$ different groups, and fills each null entry with the vector $e$ defined by equation (15). The uniform partition is what makes the vector symbols well-defined and guarantees both regularity and Condition C3: every occurrence of a symbol forces a star at the crossed rows and columns, and each vector appears exactly $\binom{m}{t}g_1^t$ times.
What would settle it
Compute $P_{3,2}$ from Construction 1 for the 2-(4,4,2,4) base PDA in equation (2), with $m=3$, $t=2$, and $\lambda=1$. The theorem predicts $S=4^{3-2}\cdot 4^2 = 64$ distinct symbols, each appearing $\binom{3}{2}\cdot 2^2 = 12$ times, and every column containing $4^2(1-(2/4)^2)=48$ stars; a direct inspection that finds any symbol appearing a different number of times, any column with a different star count, or any pair of equal entries whose cross-entries are not both stars refutes Theorem 1. A broader computational search over small base PDAs, checking these conditions for all $2\le m\le 4$ and $1\le t\le m$, would provide the same test on the general claim.
Extended reading notes
Core claim
The central discovery is Theorem 1: a construction that, for any base PDA with parameter $\lambda$ and any $1\le t\le m$, produces a $\binom{m}{t}g_1^t$-regular PDA $P_{m,t}$ with parameters as stated above. The proof works by placing, at each null entry of the placement array, an $m$-dimensional vector chosen from the set $\mathcal{S} = \{(e_1,\ldots,e_m): e_i = B_{r_i}[\nu_i], r_i \in [1:F_1/\lambda], \nu_i \in [1:\lambda S_1/F_1], \nu_1 = \cdots = \nu_{m-t+1}\}$, so each broadcast message is simultaneously useful inside each of the $\binom{m}{t}$ groups, and XOR-across-groups yields a total gain of $\binom{m}{t}g_1^t$. The resulting coded caching scheme has memory ratio $1-((F_1-Z_1)/F_1)^t$, subpacketization $\lambda^t(F_1/\lambda)^m$, and load $(S_1/F_1)^t$.
Load-bearing premise
The construction stands or falls on the base PDA satisfying Conditions C4 and C5 of Definition 3 — namely that its rows split into $\lambda$ identical-star subarrays and its broadcast symbols split uniformly into star rows — because both the vector set $\mathcal{S}$ and the proof of regularity use that uniform partition directly.
Editorial extensions
If this is right
- For any base PDA as in Theorem 1 and any $t\le m$, there exists a coded caching scheme with $\binom{m}{t}K_1^t$ users, memory ratio $1-((F_1-Z_1)/F_1)^t$, subpacketization $\lambda^t(F_1/\lambda)^m$, and load $(S_1/F_1)^t$; fixing the memory ratio and letting $m$ grow makes the subpacketization sub-exponential in the user count while the load stays constant.
- The three instantiations (Schemes A, B, C) recover, respectively, the Cartesian-product schemes of [16, Theorems 3, 4, 5] when $t=1$ and the hypergraph-based scheme of [21, Theorem 18] when $z=1$, so the construction is strictly more general than those lines.
- Compared with the WCLC scheme in [15], Scheme A attains the same load when $z=1$ or $z=q-1$ and a strictly lower load when $1<z<q-1$; Scheme C achieves load $1/2^t$ times that of [15] and, for large $m$, lower subpacketization.
- Between $\binom{m}{t}K_1^t$ and $\binom{m+1}{t}K_1^t$ users, treating the missing users as virtual users gives the same load with at most a constant-factor increase in subpacketization.
- Because Lemma 2 converts any regular PDA with constant per-row star count into a base PDA, Theorem 1 applies not only to the three showcased PDAs but to essentially every existing $g$-regular PDA construction.
Reading between the lines
- The construction's real novelty is the union step: it treats the Cartesian-product columns as a pool of cache configurations and chooses $t$-subsets across groups, effectively multiplexing $t$ layers of multicast; the same recipe might be iterated, e.g. taking unions of unions, to compound the exponentiation further, though the paper does not explore this.
- The vector symbols in $\mathcal{S}$ can be read as messages labeled by $m$-tuples whose first $m-t+1$ coordinates share a common index; this suggests a direct index-coding reformulation in which the gain $\binom{m}{t}g_1^t$ is a product of a combinatorial factor and a base gain, potentially connecting to multi-user MISO or D2D variants.
- The main limitation inherited from Definition 3 is the uniformity requirement in C5; relaxing it to a covering condition would likely extend the theorem to base PDAs that are only row-star-coverable, and the resulting non-uniform symbol counts would make the scheme's load and gain trade differently.
- For fixed memory ratio, the scheme's load is the $t$-th power of the base load, so choosing a small base load pays off doubly; this suggests searching for base PDAs with very low $R_1$ at moderate $F_1$ will be the most direct route to practical gains.
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The paper proposes a new placement delivery array (PDA) construction for coded caching. Starting from a base PDA satisfying two additional structural conditions (C4 and C5), the authors take the m-fold Cartesian product of its cache configurations, split the resulting configurations into m groups, and form new cache states as unions of t configurations taken from t distinct groups. Theorem 1 states that this yields a C(m,t) g1^t-regular PDA with C(m,t) K1^t users, subpacketization λ^t (F1/λ)^m, per-column stars λ^t (F1/λ)^m (1 - ((F1-Z1)/F1)^t), transmission symbols (F1/λ)^{m-t} S1^t, and load (S1/F1)^t. The construction is given in Construction 1, a worked example is provided, and a detailed proof of the PDA conditions and regularity appears in Appendix A. Three corollaries instantiate the construction from the MN PDA, its transpose, and a known base PDA, yielding three new coded caching schemes (Scheme A, B, C) whose parameters are listed in Table I and compared with existing schemes in Section V.
Significance. If the central claim is correct, this is a meaningful advance in PDA-based coded caching. The construction generalizes the authors' earlier Cartesian-product construction [16] (recovered at t=1) and, for fixed t>1, achieves user count and coded caching gain growing as powers of the base parameters while subpacketization grows only subexponentially in the number of users. The parameter bookkeeping is internally consistent: the star count per column, the transmission-symbol count, and the claimed multiplicity C(m,t) g1^t all match, and the worked example (m=3, t=2) verifies the formulas. The proof is self-contained and the corollaries are correctly derived from the stated base PDAs. The paper also gives explicit comparisons showing regimes where the new schemes outperform prior constructions in load and/or subpacketization.
minor comments (5)
- [Appendix A, proof of Theorem 1, statement (3)] The proof that each vector e appears exactly C(m,t) g1^t times is terse. Statement (b) is proved only for the original T, while statement (a) gives existence for any T'. To complete the counting, the same argument as in statement (b) should be applied to the representation of e for each T' (which statement (a) provides), showing that the number of occurrences in columns indexed by each T' is exactly g1^t. The present wording 'The two statements imply...' is acceptable but would benefit from this one-sentence clarification.
- [Section II-C, paragraph after Lemma 2] The sentence 'It is worth noting that any existing PDA has the same number of stars in each row [16]' is too broad as stated; the PDA definition itself does not require uniform row star counts. The intended meaning appears to be that all PDAs constructed in the referenced literature have this property, and the statement should be qualified accordingly.
- [Section I-A, second difficulty] There is a typo: 'ahcieve' should be 'achieve'.
- [Abstract and Section I-A] The phrase 'exponential growth in both the number of users and coded caching gain' is imprecise for fixed t, where the growth is polynomial in m (of degree t); the exponential behavior refers to the base K1^t and g1^t. The paper should state this more carefully to avoid overclaiming.
- [Table I] Several entries in Table I have ambiguous formatting, e.g., the load column for the scheme in [16] appears as 'q−z z' without an explicit fraction. The authors should ensure all fractions are typeset unambiguously.
Circularity Check
No significant circularity: Theorem 1 is a self-contained combinatorial construction whose inputs (base PDA conditions) do not already contain the conclusion.
full rationale
The central result, Theorem 1, is an explicit construction (Construction 1) from an arbitrary g1-(K1,F1,Z1,S1) base PDA with parameter λ; the proof in Appendix A verifies Conditions C1–C3 directly from the base-PDA axioms. The regularity count C(m,t)g1^t, star count λ^t(F1/λ)^m(1−((F1−Z1)/F1)^t), and symbol count (F1/λ)^(m−t)S1^t are derived by counting non-star entries and by the uniform partition B1,...,B_{F1/λ} supplied by Condition C5; none of these parameters is fitted or defined as the target quantity. The t=1 case reduces to Lemma 4 of [16], and Corollaries 1–3 plug in base PDAs from Lemmas 2–3 of [16]; these are published, parameter-free existence results whose assumptions do not include Theorem 1, so under the stated rules they are independent evidence rather than a self-citation chain. The load (S1/F1)^t is not assumed but follows from S/F arithmetic: S=(F1/λ)^(m−t)S1^t and F=λ^t(F1/λ)^m. The paper contains no fitted parameters, no uniqueness theorem invoked to force a choice, and no renamed known result: the new family genuinely generalizes [16] from t=1 to t>1 while changing the scaling from linear to exponential in users and gain. The only weakness is that the lengthy case analysis in Appendix A is not machine-checked, which is a verification risk, not circularity.
Assumptions & free parameters
assumptions (4)
- domain assumption Lemma 1: a (K,F,Z,S) PDA satisfying conditions C1-C3 yields a (K,M,N) coded caching scheme with M/N = Z/F and load R = S/F.
- domain assumption Lemma 2: any g1-regular PDA with the same number of stars in each row can be transformed into a (g1-1)-regular base PDA with parameter lambda = g1-1.
- domain assumption Lemma 3: for any integer q >= 2, there exists a 2-(q^2, 2q, 2, (q-1)q^2) base PDA with parameter lambda = 1.
- domain assumption The known PDAs used in the paper are regular and have the same number of stars in each row, as asserted with reference to prior work.
Cite this review
Pith. "Pith review of PDA Construction via Union of Cartesian Product Cache Configurations for Coded Caching." pith.science (2026). https://pith.science/paper/A5FNAPOU
@misc{pith2026250111834,
author = {Pith},
title = {Pith review of: PDA Construction via Union of Cartesian Product Cache Configurations for Coded Caching},
year = {2026},
howpublished = {\url{https://pith.science/paper/A5FNAPOU}},
note = {Machine review of arXiv:2501.11834}
}
abstract
Caching is an efficient technique to reduce peak traffic by storing popular content in local caches. Placement delivery array (PDA) proposed by Yan et al. is a combinatorial structure to design coded caching schemes with uncoded placement and one-shot linear delivery. By taking the $m$-fold Cartesian product of a small base PDA, Wang et al. constructed a big PDA while maintaining the memory ratio and transmission load unchanged, which achieves linear growth in both the number of users and coded caching gain. In order to achieve exponential growth in both the number of users and coded caching gain, in this paper we propose a PDA construction by taking the union operation of the cache configurations from the $m$-fold Cartesian product of a base PDA. The resulting PDA leads to a coded caching scheme with subpacketization increasing sub-exponentially with the number of users while keeping the load constant for fixed memory ratio. By applying the proposed construction to existing base PDAs, three new coded caching schemes are obtained, which cover some existing schemes as special cases and can achieve lower load with simultaneously lower subpacketization for some memory ratios.
Figures
Forward citations
Cited by 1 Pith paper
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On Hierarchical Coded Caching with Offline Users
A new array construction, HHPDA, extends coded caching with offline users to hierarchical networks where mirrors also have caches.
Reference graph
Works this paper leans on
-
[16]
Placement delivery array construction via cartesian product for coded caching,
J. Wang, M. Cheng, K. Wan, and G. Caire, “Placement delivery array construction via cartesian product for coded caching,” IEEE Trans. Inf. Theory , vol. 69, no. 12, pp. 7602–7626, Dec. 2023
work page 2023
-
[1]
Fundamental limits of caching,
M. A. Maddah-Ali and U. Niesen, “Fundamental limits of caching,” IEEE Trans. Inf. Theory, vol. 60, no. 5, pp. 2856–2867, May 2014. 35
work page 2014
-
[2]
Characterizing the rate-memory tradeoff in cache networks within a factor of 2,
Q. Yu, M. A. Maddah-Ali, and A. S. Avestimehr, “Characterizing the rate-memory tradeoff in cache networks within a factor of 2,” IEEE Trans. Inf. Theory , vol. 65, no. 1, pp. 647–663, Jan. 2019
work page 2019
-
[3]
On the optimality of uncoded cache placement,
K. Wan, D. Tuninetti, and P. Piantanida, “On the optimality of uncoded cache placement,” in Proc. IEEE Inf. Theory Workshop (ITW), Sep. 2016, pp. 161–165
2016
-
[4]
An index coding approach to caching with uncoded cache placement,
——, “An index coding approach to caching with uncoded cache placement,” IEEE Trans. Inf. Theory , vol. 66, no. 3, pp. 1318–1332, Mar. 2020
work page 2020
-
[5]
The exact rate-memory tradeoff for caching with uncoded prefetching,
Q. Yu, M. A. Maddah-Ali, and A. S. Avestimehr, “The exact rate-memory tradeoff for caching with uncoded prefetching,” IEEE Trans. Inf. Theory , vol. 64, no. 2, pp. 1281–1296, Feb. 2018
2018
-
[6]
Finite-length analysis of caching-aided coded multicasting,
K. Shanmugam, M. Ji, A. M. Tulino, J. Llorca, and A. G. Dimakis., “Finite-length analysis of caching-aided coded multicasting,” IEEE Trans. Inf. Theory , vol. 62, no. 10, pp. 5524–5537, Oct. 2016
2016
-
[7]
On the placement delivery array design for centralized coded caching scheme,
Q. Yan, M. Cheng, X. Tang, and Q. Chen, “On the placement delivery array design for centralized coded caching scheme,” IEEE Trans. Inf. Theory , vol. 63, no. 9, pp. 5821–5833, Sep. 2017
2017
Show all 22 references
-
[8]
Placement delivery array design through strong edge coloring of bipartite graphs,
Q. Yan, X. Tang, Q. Chen, and M. Cheng, “Placement delivery array design through strong edge coloring of bipartite graphs,” IEEE Commun. Lett. , vol. 22, no. 2, pp. 236–239, Feb. 2018
2018
-
[9]
Constructions of coded caching schemes with flexible memory size,
M. Cheng, J. Jiang, Q. Yan, and X. Tang, “Constructions of coded caching schemes with flexible memory size,” IEEE Trans. Commun., vol. 67, no. 6, pp. 4166–4176, Jun. 2019
2019
-
[10]
A generalized grouping scheme in coded caching,
M. Cheng, J. Jiang, Q. Wang, and Y . Yao, “A generalized grouping scheme in coded caching,” IEEE Trans. Commun. , vol. 67, no. 5, pp. 3422–3430, May 2019
2019
-
[11]
Some variant of known coded caching schemes with good performance,
M. Cheng, J. Jiang, X. Tang, and Q. Yan, “Some variant of known coded caching schemes with good performance,” IEEE Trans. Commun., vol. 68, no. 3, pp. 1370–1377, Mar. 2020
2020
-
[12]
Coded caching schemes with linear subpacketizations,
X. Zhong, M. Cheng, and R. Wei, “Coded caching schemes with linear subpacketizations,” IEEE Trans. Commun., vol. 69, no. 6, pp. 3628–3637, Jun. 2021
2021
-
[13]
A framework of constructing placement delivery arrays for centralized coded caching,
M. Cheng, J. Wang, X. Zhong, and Q. Wang, “A framework of constructing placement delivery arrays for centralized coded caching,” IEEE Trans. Inf. Theory , vol. 67, no. 11, pp. 7121–7131, Nov. 2021
2021
-
[14]
Lifting constructions of PDAs for coded caching with linear subpacketization,
V . R. Aravind, P. K. Sarvepalli, and A. Thangaraj, “Lifting constructions of PDAs for coded caching with linear subpacketization,” IEEE Trans. Commun. , vol. 70, no. 12, pp. 7817–7829, Dec. 2022
2022
-
[15]
Design of placement delivery arrays for coded caching with small subpacketizations and flexible memory sizes,
X. Wu, M. Cheng, C. Li, and L. Chen, “Design of placement delivery arrays for coded caching with small subpacketizations and flexible memory sizes,” IEEE Trans. Commun. , vol. 70, no. 11, pp. 7089–7104, Nov. 2022
2022
-
[17]
Placement delivery array design for coded caching scheme in D2D networks,
J. Wang, M. Cheng, Q. Yan, and X. Tang, “Placement delivery array design for coded caching scheme in D2D networks,” IEEE Trans. Commun. , vol. 67, no. 5, pp. 3388–3395, May 2019
2019
-
[18]
Improved constructions of coded caching schemes for combination networks,
M. Cheng, Y . Li, X. Zhong, and R. Wei, “Improved constructions of coded caching schemes for combination networks,” IEEE Trans. Commun. , vol. 68, no. 10, pp. 5965–5975, Oct. 2020
2020
-
[19]
Multiple-antenna placement delivery array for cache-aided MISO systems,
T. Yang, K. Wan, M. Cheng, R. C. Qiu, and G. Caire, “Multiple-antenna placement delivery array for cache-aided MISO systems,” IEEE Trans. Inf. Theory , vol. 69, no. 8, pp. 4855–4868, Aug. 2023
2023
-
[20]
Coded caching schemes with reduced subpacketization from linear block codes,
L. Tang and A. Ramamoorthy, “Coded caching schemes with reduced subpacketization from linear block codes,” IEEE Trans. Inf. Theory , vol. 64, no. 4, pp. 3099–3120, Apr. 2018
2018
-
[21]
Centralized coded caching schemes: A hypergraph theoretical approach,
C. Shangguan, Y . Zhang, and G. Ge, “Centralized coded caching schemes: A hypergraph theoretical approach,” IEEE Trans. Inf. Theory , vol. 64, no. 8, pp. 5755–5766, Aug. 2018
2018
-
[22]
Subexponential and linear subpacketization coded caching via projective geometry,
H. H. S. Chittoor, P. Krishnan, K. V . S. Sree, and B. Mamillapalli, “Subexponential and linear subpacketization coded caching via projective geometry,” IEEE Trans. Inf. Theory , vol. 67, no. 9, pp. 6193–6222, Sep. 2021
2021
Reviewed August 10, 2026 · model on record in the stance chip above.
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