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The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing

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arxiv 2103.08392 v2 pith:BXOILWHF submitted 2021-03-15 cs.AR

Sebastian Höppner , Yexin Yan , Andreas Dixius , Stefan Scholze , Johannes Partzsch , Marco Stolba , Florian Kelber , Bernhard Vogginger
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Felix Neumärker Georg Ellguth Stephan Hartmann Stefan Schiefer Thomas Hocker Dennis Walter Genting Liu Jim Garside Steve Furber Christian Mayr
This is my paper · ORCID
classification cs.AR
keywords architectureelementoperationprocessingspinnakerchipgenerationhybrid
verification ladder T0 review T1 audit T2 compute T3 formal
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This paper introduces the processing element architecture of the second generation SpiNNaker chip, implemented in 22nm FDSOI. On circuit level, the chip features adaptive body biasing for near-threshold operation, and dynamic voltage-and-frequency scaling driven by spiking activity. On system level, processing is centered around an ARM M4 core, similar to the processor-centric architecture of the first generation SpiNNaker. To speed operation of subtasks, we have added accelerators for numerical operations of both spiking (SNN) and rate based (deep) neural networks (DNN). PEs communicate via a dedicated, custom-designed network-on-chip. We present three benchmarks showing operation of the whole processor element on SNN, DNN and hybrid SNN/DNN networks.

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Forward citations

Cited by 5 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Energy Aware Development of Neuromorphic Implantables: From Metrics to Action

    cs.NE 2025-06 accept novelty 5.0 of 10

    None of the 13 reviewed SNN energy metrics is both easy to compute without specialized hardware and faithful to real energy use, and most lack actionable guidance.

  2. High-Speed Time Series Prediction with a GHz-rate Photonic Spiking Neural Network built with a single VCSEL

    physics.comp-ph 2024-12 conditional novelty 4.0 of 10

    A single VCSEL laser, split into hundreds of virtual spiking neurons and fed with a ten-step-delayed copy of the input, predicts the chaotic Mackey-Glass series with NMSE as low as 0.051.

  3. Efficient Spatio-Temporal Signal Recognition on Edge Devices Using PointLCA-Net

    cs.LG 2024-11 conditional novelty 4.0 of 10

    PointLCA-Net stores PointNet features in a dictionary and uses a spiking Locally Competitive Algorithm encoder-decoder to classify spatio-temporal event data, reporting up to 98.78% accuracy with lower estimated energ...

  4. Hardware Trends Impacting Floating-Point Computations In Scientific Applications

    math.NA 2024-11 unverdicted novelty 2.0 of 10

    A review of floating-point hardware evolution and current AI-driven trends in reduced precision, mixed precision, and emulation.

  5. Contemporary implementations of spiking bio-inspired neural networks

    cs.NE 2024-12 conditional

    A review of CMOS, memristive, superconducting, and optical hardware for spiking neural networks, concluding that hybrid approaches are the most promising direction.

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