Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
As of 8 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 4 inbound Pith citation observations for arXiv:2312.01022.
A citation records a reference. It does not transfer a finding from one paper to another.
Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-08T06:32:00.761636+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-05T15:17:26.624466Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-05-10T14:40:32.686396Z
0 of 0 outbound references displayed
External citation measurements
No source-named external measurement is stored.
No outbound reference observations are available for this paper version.
Observation a593338a-4518-4f66-96ef-62f9f47d3da3 · inbound
Large Language Models (LLMs) for Electronic Design Automation (EDA) Advanced Large Language Model (LLM)-Driven Verilog Development: Enhancing Power, Performance, and Area Optimization in Code Synthesis
Reference 23
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 183f9892-97a6-4663-9c86-0327b7ad6f21 · inbound
Can Agents Secure Hardware? Evaluating Agentic LLM-Driven Obfuscation for IP Protection Advanced Large Language Model (LLM)-Driven Verilog Development: Enhancing Power, Performance, and Area Optimization in Code Synthesis
Reference 5
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.
Observation 9e6b497a-c576-4ce8-a92f-9565a7855b94 · inbound
Dr. RTL: Autonomous Agentic RTL Optimization through Tool-Grounded Self-Improvement Advanced Large Language Model (LLM)-Driven Verilog Development: Enhancing Power, Performance, and Area Optimization in Code Synthesis
Reference 37
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.
Observation bdff3903-0d1e-4a86-bb54-e0c82920617d · inbound
AutoPPA: Automated Circuit PPA Optimization via Contrastive Code-based Rule Library Learning Advanced Large Language Model (LLM)-Driven Verilog Development: Enhancing Power, Performance, and Area Optimization in Code Synthesis
Reference 24
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.