Paper Citation Record · LEDGER

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design

As of 18 August 2026, this Paper Citation Record lists 27 of 27 outbound references and 4 inbound Pith citation observations for arXiv:2507.06376.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2507.06376 v1

Coverage vector

measured 27 of 27 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-06T19:10:41.871909Z

measured 31 of 31 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-18T06:34:40.430872+00:00

measured 4 of 4 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-16T00:08:22.457101Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-07-04T15:09:55.510146Z

Reference resolution

27 of 27 outbound references displayed

verified exact2
verified fuzzy23
unresolved2
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation ab83605c-6237-4dfe-acf7-eca365aca53d · outbound

This paper cites Agile SoC development with open ESP,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Agile SoC development with open ESP,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.200791Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 998055d5-2a1c-4ba3-a111-7305095a6638 · outbound

This paper cites Invited: A modular digital VLSI flow for high-productivity SoC Design,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Invited: A modular digital VLSI flow for high-productivity SoC Design,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.190194Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation d873e4a0-9b08-4ebb-a124-165a0b77484c · outbound

This paper cites Rashinkar, P.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Rashinkar, P

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.179708Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 8dcd5391-ebbc-4d0d-a92b-fada6d7393e8 · outbound

This paper cites Chipyard: Integrated design, simulation, and implementation framework for custom SoCs,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Chipyard: Integrated design, simulation, and implementation framework for custom SoCs,

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.168633Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation a10eb477-fc2d-4205-aef0-9ccbe5ab0fd8 · outbound

This paper cites Does SoC hardware development become agile by saying so: A literature review and mapping study,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Does SoC hardware development become agile by saying so: A literature review and mapping study,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.157699Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 5b6ff138-3e9d-4e54-8bca-1c76b7b030d9 · outbound

This paper cites A scalable methodology for agile chip development with open-source hardware components,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design A scalable methodology for agile chip development with open-source hardware components,

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.147220Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation b14c515b-d923-4f35-a816-646554c3a0b3 · outbound

This paper cites Automatically improving LLM-based Verilog generation using EDA tool feedback,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Automatically improving LLM-based Verilog generation using EDA tool feedback,

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.135967Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 07058aa9-5d4f-4b9f-88aa-c71dac7c2048 · outbound

This paper cites RTLFixer: Automatically fixing RTL syntax errors with Large Language Model,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design RTLFixer: Automatically fixing RTL syntax errors with Large Language Model,

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.124426Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation b77d8ad3-8379-48bf-9045-881bfb7c215a · outbound

This paper cites VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-06T19:10:41.813419Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a9401cc9-e513-4f27-9327-bc1c60044d7a · outbound

This paper cites RTLCoder: Outperforming GPT-3.5 in design RTL generation with our open-source dataset and lightweight solution,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design RTLCoder: Outperforming GPT-3.5 in design RTL generation with our open-source dataset and lightweight solution,

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.113877Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 7613b8b1-a378-40a6-9446-b6634bbb2dc0 · outbound

This paper cites Koios: A deep learning benchmark suite for FPGA architecture and CAD re- search,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Koios: A deep learning benchmark suite for FPGA architecture and CAD re- search,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.102981Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation d8cfbb90-d333-418a-ac64-581c1d8615e8 · outbound

This paper cites Benchmarking Large Language Models for au- tomated Verilog RTL code generation,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Benchmarking Large Language Models for au- tomated Verilog RTL code generation,

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.089754Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 38016ae6-443a-45cf-b5e9-7e98c9fa330c · outbound

This paper cites VerilogEval: evaluating Large Language Models for Verilog code generation,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design VerilogEval: evaluating Large Language Models for Verilog code generation,

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.077886Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation e9ad1171-7df0-41e1-9962-acda739cfd58 · outbound

This paper cites SA-DS: A Dataset for Large Language Model-Driven AI Accelerator Design Generation.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design SA-DS: A Dataset for Large Language Model-Driven AI Accelerator Design Generation

Reference 14

Resolution: verified exact; local_arxiv, observed 2026-08-06T19:10:41.926399Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation a839c39b-4c79-4358-bf74-d51466c26deb · outbound

This paper cites Gemmini: Enabling systematic deep-learning architecture evaluation via full-stack integration,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Gemmini: Enabling systematic deep-learning architecture evaluation via full-stack integration,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.067365Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 97ce9d47-fb95-45a3-94e6-ab631642ef75 · outbound

This paper cites MG-Verilog: multi- grained dataset towards enhanced LLM-assisted Verilog generation,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design MG-Verilog: multi- grained dataset towards enhanced LLM-assisted Verilog generation,

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.056958Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 72c097a7-4b35-4504-b842-2a7a1a16813a · outbound

This paper cites RTLLM: An open-source benchmark for design RTL generation with Large Language Model,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design RTLLM: An open-source benchmark for design RTL generation with Large Language Model,

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.045874Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation b8218551-9059-495a-94b1-e51f7ba0ad3f · outbound

This paper cites RTL-Repo: A benchmark for evaluating LLMs on large-scale RTL design projects,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design RTL-Repo: A benchmark for evaluating LLMs on large-scale RTL design projects,

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.035251Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 3882ef19-e670-4ac7-adee-4b7789413a98 · outbound

This paper cites MetRex: A Benchmark for Verilog Code Metric Reasoning Using LLMs.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design MetRex: A Benchmark for Verilog Code Metric Reasoning Using LLMs

Reference 19

Resolution: verified exact; local_arxiv, observed 2026-08-06T19:10:41.910150Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 2b03c75e-abf3-409e-9a77-db54d05cf7f6 · outbound

This paper cites Kulal, P.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Kulal, P

Reference 20

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.024040Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation d1b74594-10dc-4648-91af-bfd8e3fd11eb · outbound

This paper cites Domain-specific hardware accelerators,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Domain-specific hardware accelerators,

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:42.011713Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation b1a3b132-4622-4016-a5a1-002719538135 · outbound

This paper cites An analysis of accelerator coupling in heterogeneous architectures,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design An analysis of accelerator coupling in heterogeneous architectures,

Reference 22

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:41.999526Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 34e78a03-a7e8-4556-bbfd-3e00edd62430 · outbound

This paper cites Invited: The case for embedded scalable platforms,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Invited: The case for embedded scalable platforms,

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:41.989519Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation fe4d9dde-e55e-485e-9134-7c73c6d5e570 · outbound

This paper cites The cost of application-class processing: Energy and performance analysis of a linux-ready 1.7-ghz 64-bit risc- v core in 22-nm fdsoi technology,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design The cost of application-class processing: Energy and performance analysis of a linux-ready 1.7-ghz 64-bit risc- v core in 22-nm fdsoi technology,

Reference 24

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:41.979430Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation ae0f5b1c-36f3-46c1-bcc7-41bc3efae8e4 · outbound

This paper cites Chain-of-thought prompting elicits reasoning in large language models,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Chain-of-thought prompting elicits reasoning in large language models,

Reference 25

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:41.968218Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 20f9f31f-7aa7-486c-8c21-6ce17143a60e · outbound

This paper cites Efficient streaming language models with attention sinks,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Efficient streaming language models with attention sinks,

Reference 26

Resolution: unresolved; no resolver link, observed 2026-08-06T19:10:41.868744Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2efd6751-c600-46fa-b1f3-71cdbaa84090 · outbound

This paper cites Language models are few-shot learners,.

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design Language models are few-shot learners,

Reference 27

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T19:10:41.949611Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Pith citing papers

Observation df847452-6846-4b1a-8e8a-2524b913833e · inbound

CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research cites this paper.

CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design

Reference 5

Resolution: verified exact; arxiv_id, observed 2026-07-04T15:09:55.511479Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation b2dcd971-5c87-4bdc-b1fd-9ec6be6ca49a · inbound

CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research cites this paper.

CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design

Reference 5

Resolution: verified exact; arxiv_id, observed 2026-06-30T12:44:39.791020Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 7bf20d7b-c43d-4c61-b124-a6a068a7385d · inbound

CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research cites this paper.

CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design

Reference 5

Resolution: unresolved; no resolver link, observed 2026-08-02T10:03:40.076737Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 80b4e30c-51b9-4f17-b638-86e6dbe8c6e2 · inbound

GateTruth: Auditing the Rigor of RTL Design Benchmarks via Mutation Testing cites this paper.

GateTruth: Auditing the Rigor of RTL Design Benchmarks via Mutation Testing SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design

Reference 3

Resolution: unresolved; no resolver link, observed 2026-08-16T00:08:22.457101Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.