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arxiv: 2606.13129 · v1 · pith:L5FKR77Pnew · submitted 2026-06-11 · 📡 eess.SP

A High Input Impedance Chopper Stabilized Amplifier Based On Charge Conservation

Prabhas K Deshpande , Naveen Kadayinti This is my paper

Pith reviewed 2026-06-27 05:47 UTC · model grok-4.3

classification 📡 eess.SP
keywords chopper stabilized amplifierinput impedance boostingcharge conservationcapacitively coupled instrumentation amplifierECG acquisitiondry electrodesCMOS amplifier
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The pith

Differential capacitor flipping makes chopper amplifier input impedance purely capacitive and independent of chopping frequency.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper proposes a differential capacitor flipping technique for chopper-stabilized capacitively coupled instrumentation amplifiers. By reconfiguring the positions of the input capacitors during chopping, the method prevents their discharge and recharge in each cycle while keeping the chopping function intact. This changes the input impedance from resistive, which depends on chopping frequency, to purely capacitive and independent of that frequency. The approach is shown in a circuit that acquires ECG signals from dry electrodes with megaohm output impedance. Implementation in 65 nm CMOS yields an input impedance of 21 GOhms at DC, with 2.6 microwatts power consumption and low noise.

Core claim

The differential capacitor flipping technique for chopper based CCIA prevents discharge and recharge of Ci's in every cycle by reconfiguring the capacitor positions while preserving the chopping operation. This ideally results in a purely capacitive Zin which is independent of Fch. The circuit implemented in TSMC 65 nm CMOS technology node features Zin of 21 GOhms at DC.

What carries the argument

Differential capacitor flipping technique, which reconfigures input capacitor positions to conserve charge while preserving chopping.

If this is right

  • The amplifier can interface directly with sensors having output impedances of several megaohms without loading effects.
  • Higher chopping frequencies become usable for flicker noise reduction because they no longer reduce input impedance.
  • ECG acquisition with dry electrodes becomes feasible at low power without external buffering.
  • The same charge-conservation approach applies to other capacitively coupled chopper amplifiers in CMOS.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The method could support multi-channel biopotential recording arrays where sensor loading must stay minimal across channels.
  • If charge conservation holds across process corners, the technique may reduce the need for large on-chip input capacitors.
  • Extension to other sensor types with high output impedance, such as certain chemical or pressure sensors, appears direct.

Load-bearing premise

Reconfiguring the capacitor positions maintains the chopping operation and achieves charge conservation without introducing additional charge injection, noise, or offset that would affect performance or the claimed independence from Fch.

What would settle it

A plot of measured input impedance versus chopping frequency that remains flat rather than falling inversely with frequency.

Figures

Figures reproduced from arXiv: 2606.13129 by Naveen Kadayinti, Prabhas K Deshpande.

Figure 1
Figure 1. Figure 1: Flicker noise profile of INA. the SNR is by sizing the transistors appropriately. Typically in amplifier circuits the input transistors contribute most to the flicker noise. Hence, the size of these input transistors is usually kept very high to improve SNR, eq. (1). However, practical limitations restrict Fc to a few thousands of hertz [2]. Another reported way of mitigating the effect of 1/f noise is to … view at source ↗
Figure 2
Figure 2. Figure 2: Chopper circuit: Ideal and Practical. After upconverting, the signal is amplified and then down￾converted. Once the signal is demodulated, the signals of interest comes back to base-band while flicker noise and offset get upconverted. This is pictorially shown in [PITH_FULL_IMAGE:figures/full_fig_p001_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: Chopper based modulation. The periodic charging and discharging of Ci results in such an expression. For typical values of Fch and Ci , Zin is in order of Mega Ohms, and this will be comparable to the output impedance of the sensors like Dry electrodes used for Bio potential application and pH sensors. The complete system of CCIA with chopper is shown [PITH_FULL_IMAGE:figures/full_fig_p002_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: Typical CCIA with chopper. The chopper circuit is shown in Fig. 2 [PITH_FULL_IMAGE:figures/full_fig_p002_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: Single ended version of chopper based CCIA with positive feedback; [PITH_FULL_IMAGE:figures/full_fig_p003_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: ). To prevent aliasing, Fch should be at least twice Fin. This relation is overshadowed by the fact that Fch also needs to be greater than Fc which is usually larger than bandwidth of input signal. almost constant [PITH_FULL_IMAGE:figures/full_fig_p003_6.png] view at source ↗
Figure 8
Figure 8. Figure 8: CCIA with DSL at block level. Here ωu is the unity gain frequency of the integrator used. sCi · Vi = sCf · Vo + sCdsl ·  ωu · Vo s  (17) Vo Vi = Ci Cf + ωuCdsl s (18) From eq. (18), the midband gain is the same as in the case of typical CCIA. In addition, there is a high pass corner at ωh = ωu ∗ Cdsl Cf . (19) This high pass corner should have a value less than 1 Hz. The impedance boosting techniques men… view at source ↗
Figure 10
Figure 10. Figure 10: Choppers can be used to flip the differential capacitors. [PITH_FULL_IMAGE:figures/full_fig_p004_10.png] view at source ↗
Figure 11
Figure 11. Figure 11: Final architecture at block level. to + Tch 2 + 3d 2 to to + Tch − 2d to + T ch 2 + d 2 to + Tch ϕ1 ϕ3 ϕ2 ϕ4 to + Tch − d (to + d) to + Tch 2 − d 2 to + Tch 2 − 3d 2 to to+Tch/2 [PITH_FULL_IMAGE:figures/full_fig_p005_11.png] view at source ↗
Figure 12
Figure 12. Figure 12: Two sets of non-overlapping clocks. 1) Deriving the input impedance: From [PITH_FULL_IMAGE:figures/full_fig_p005_12.png] view at source ↗
Figure 13
Figure 13. Figure 13: Clock generation circuit. IV. EFFECT OF PARASITICS: THE GOOD AND THE BAD Section III presented the analysis of the proposed circuit with ideal components. This section explains the proposed circuit taking into account parasitic impedances. A careful look at the nodes (A+, A−) and (B+, B−) in [PITH_FULL_IMAGE:figures/full_fig_p006_13.png] view at source ↗
Figure 15
Figure 15. Figure 15: The Zin relation can be expressed as, Zin = 1 2FchCp || 1 ωinCi , (26) where Cp is the equivalent parasitic capacitance. A. Transfer function of the proposed circuit Consider a typical CCIA shown in [PITH_FULL_IMAGE:figures/full_fig_p006_15.png] view at source ↗
Figure 14
Figure 14. Figure 14: Final architecture at block level including parasitic capacitances. [PITH_FULL_IMAGE:figures/full_fig_p007_14.png] view at source ↗
Figure 15
Figure 15. Figure 15: Zin characteristics of proposed circuit. − + − + a Ci Ci Cf Cf Vinm Vinp Vop Vom Ci i1 Cf i2 Vin Vo − + a Single ended version D+ D− Vd i3 ≈ 0 [PITH_FULL_IMAGE:figures/full_fig_p007_15.png] view at source ↗
Figure 16
Figure 16. Figure 16: Typical CCIA and its single ended equivalent, [PITH_FULL_IMAGE:figures/full_fig_p007_16.png] view at source ↗
Figure 17
Figure 17. Figure 17: Single ended version of proposed architecture in amplifying phase. [PITH_FULL_IMAGE:figures/full_fig_p007_17.png] view at source ↗
Figure 18
Figure 18. Figure 18: Charge redistribution: Input capacitors and parasitic capacitor at [PITH_FULL_IMAGE:figures/full_fig_p007_18.png] view at source ↗
Figure 20
Figure 20. Figure 20: Pseudo resistor: Off transistor The complete schematic of the folded cascode OPAMP/OTA is shown in [PITH_FULL_IMAGE:figures/full_fig_p008_20.png] view at source ↗
Figure 19
Figure 19. Figure 19: Charge redistribution: Feedback capacitors and parasitic capacitor at [PITH_FULL_IMAGE:figures/full_fig_p008_19.png] view at source ↗
Figure 21
Figure 21. Figure 21: Folded cascode OPAMP/OTA. 10 0 10 1 10 2 10 3 10 4 10 5 Frequency (Hz) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Noise (V**2/Hz) 1e 10 Schematic vs. Post-Layout Noise Profile Schematic Noise Post-Layout Noise [PITH_FULL_IMAGE:figures/full_fig_p009_21.png] view at source ↗
Figure 22
Figure 22. Figure 22: Noise profile of folded cascode OPAMP/OTA. [PITH_FULL_IMAGE:figures/full_fig_p009_22.png] view at source ↗
Figure 23
Figure 23. Figure 23: Proven noise improvement of this modulation scheme. [PITH_FULL_IMAGE:figures/full_fig_p009_23.png] view at source ↗
Figure 26
Figure 26. Figure 26: Common mode equivalent circuit. gm1vx r1 Cp gm2vy r2 1 Cgd vy vo vx C [PITH_FULL_IMAGE:figures/full_fig_p010_26.png] view at source ↗
Figure 27
Figure 27. Figure 27: Small signal equivalent of common mode equivalent circuit. [PITH_FULL_IMAGE:figures/full_fig_p010_27.png] view at source ↗
Figure 28
Figure 28. Figure 28: Before adding capacitor at node vy of [PITH_FULL_IMAGE:figures/full_fig_p011_28.png] view at source ↗
Figure 29
Figure 29. Figure 29: After adding capacitor at node vy of [PITH_FULL_IMAGE:figures/full_fig_p011_29.png] view at source ↗
read the original abstract

Chopper stabilized amplifiers are popularly used for realizing amplifiers with low offset and for rejecting flicker noise. One of the main limitations of these amplifiers is the low Input Impedance (Zin) produced by the switch capacitor input network. Zin here is resistive due to the switch capacitor action and is inversely proportional to the product of Chopping frequency (Fch) and Input Capacitance (Ci). Since Fch should be greater than the flicker noise corner frequency, this results in a low Zin. When interfacing sensors with high Sensor Output Impedance (Zo), chopper stabilized amplifiers load the sensors resulting in reduced sensitivity. This paper presents a novel input impedance boosting technique - Differential capacitor flipping technique for chopper based Capacitively Coupled Instrumentation Amplifier (CCIA), which prevents discharge and recharge of Ci's in every cycle by reconfiguring the capacitor positions while preserving the chopping operation. This ideally results in a purely capacitive Zin which is independent of Fch. The proposed architecture is used to demonstrate Electrocardiogram (ECG) signal acquisition with dry electrodes that have Zo in the order of a few Mega Ohms. This circuit implemented in TSMC 65 nm CMOS technology node features Zin of 21 GOhms at DC. The circuit has a power consumption of 2.6E(-6)W (2.8E(-6)W including clock generation circuits), with 7.2E(-6)Vrms (1 Hz-150 Hz) of total integrated input referred noise. ~

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The manuscript proposes a differential capacitor flipping technique for chopper-stabilized capacitively coupled instrumentation amplifiers (CCIA). By reconfiguring the positions of the input capacitors while preserving chopping, the method aims to conserve charge and eliminate the switched-capacitor resistive component of Zin, yielding a purely capacitive input impedance independent of chopping frequency Fch. The design is realized in TSMC 65 nm CMOS, reports a DC Zin of 21 GΩ, consumes 2.6 µW (2.8 µW with clock generation), and demonstrates ECG acquisition using dry electrodes with sensor output impedances in the MΩ range.

Significance. If the claimed Fch independence holds under realistic switch parasitics, the technique would remove a fundamental limitation of conventional chopper CCIA designs when interfacing high-Zo sensors. The reported DC Zin value and power/noise figures indicate a practical implementation suitable for biomedical applications; however, the absence of explicit verification that Zin remains constant with varying Fch limits the strength of the central claim.

major comments (2)
  1. [Abstract / Results] Abstract and results: only a single DC Zin value (21 GΩ) is stated. The central claim of purely capacitive, Fch-independent Zin requires explicit confirmation (measurement or simulation) that Zin does not vary with Fch; without this, residual switched-capacitor resistance from finite switch resistance or charge injection cannot be ruled out.
  2. [Proposed Technique] Proposed technique section: the differential flipping reconfiguration must be shown to preserve exact charge conservation and chopping polarity without introducing additional charge-injection paths or mismatch-induced leakage. The manuscript should provide either an analytical model of the residual resistive term or Monte-Carlo/simulation results quantifying deviation from ideal capacitive behavior.
minor comments (2)
  1. [Abstract] The abstract states “ideally results in a purely capacitive Zin”; the manuscript should clarify whether this idealization is supported by measured data across Fch or remains an unverified modeling assumption.
  2. [Results] Power and noise figures are given with and without clock generation; the manuscript should specify the exact bandwidth (1 Hz–150 Hz) used for the integrated noise measurement and confirm it matches the ECG application bandwidth.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the detailed and constructive review. The comments highlight the need to strengthen the evidence for the central claim of frequency-independent input impedance. We address each major comment below and will revise the manuscript to incorporate the requested verifications and analyses.

read point-by-point responses

  1. Referee: [Abstract / Results] Abstract and results: only a single DC Zin value (21 GΩ) is stated. The central claim of purely capacitive, Fch-independent Zin requires explicit confirmation (measurement or simulation) that Zin does not vary with Fch; without this, residual switched-capacitor resistance from finite switch resistance or charge injection cannot be ruled out.

    Authors: We agree that a single DC measurement is insufficient to fully substantiate the Fch-independence claim. In the revised manuscript, we will add both measured Zin values across a range of chopping frequencies (e.g., 1 kHz to 10 kHz) and corresponding circuit simulations that include finite switch resistance and charge injection. These additions will explicitly confirm that the resistive component remains negligible and that Zin stays capacitive. revision: yes

  2. Referee: [Proposed Technique] Proposed technique section: the differential flipping reconfiguration must be shown to preserve exact charge conservation and chopping polarity without introducing additional charge-injection paths or mismatch-induced leakage. The manuscript should provide either an analytical model of the residual resistive term or Monte-Carlo/simulation results quantifying deviation from ideal capacitive behavior.

    Authors: We will expand the proposed technique section with a step-by-step analytical derivation of charge conservation across the differential flipping phases, explicitly showing that chopping polarity is preserved and no additional charge-injection paths are created under ideal conditions. We will also include Monte-Carlo simulation results (accounting for device mismatch and switch parasitics) that quantify the residual resistive term, demonstrating that any deviation from purely capacitive behavior remains below the measurement noise floor. revision: yes

Circularity Check

0 steps flagged

No circularity: claim follows directly from described circuit topology

full rationale

The paper presents the differential capacitor flipping technique as a circuit reconfiguration that prevents discharge/recharge of Ci by repositioning capacitors while preserving chopping, directly yielding (ideally) purely capacitive Zin independent of Fch. No equations, fitted parameters, or predictions are shown that reduce this independence to a prior input or self-citation; the 21 GΩ DC measurement is reported as an experimental result of the implemented topology in 65 nm CMOS. The text contains no self-citations, uniqueness theorems, or ansatzes that load-bear the central claim. The derivation chain is therefore self-contained as a topological consequence under the stated ideal-switch assumptions.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

Abstract-only review yields minimal ledger entries. The central technique rests on domain assumptions about switched-capacitor networks rather than new free parameters or invented entities.

axioms (1)
  • domain assumption Capacitor reconfiguration during chopping preserves charge conservation and chopping function without side effects
    This premise is required for the claimed purely capacitive Zin independent of Fch.

pith-pipeline@v0.9.1-grok · 5798 in / 1186 out tokens · 24959 ms · 2026-06-27T05:47:27.856745+00:00 · methodology

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Reference graph

Works this paper leans on

17 extracted references

  1. [1]

    Design of analog cmos integrated circuits, 2000

    Behzad Razavi. Design of analog cmos integrated circuits, 2000

    2000

  2. [2]

    Menolfi and Qiuting Huang

    C. Menolfi and Qiuting Huang. A fully integrated, untrimmed cmos instrumentation amplifier with submicrovolt offset.IEEE Journal of Solid-State Circuits, 34(3):415–420, 1999

    1999

  3. [3]

    Capacitively- coupled chopper amplifiers.Delft University of Technology

    Qinwen Fan, Kofi AA Makinwa, and Johan H Huijsing. Capacitively- coupled chopper amplifiers.Delft University of Technology. Ipskamp Druckkers BV, 2013

    2013

  4. [4]

    Chopper instrumentation amplifier design with fully symmetric loops for input impedance boosting.IEEE Transactions on Circuits and Systems I: Regular Papers, 71(10):4434–4445, 2024

    Safaa Abdelfattah, Nikita Mirchandani, Aatmesh Shrivastava, and Mar- vin Onabajo. Chopper instrumentation amplifier design with fully symmetric loops for input impedance boosting.IEEE Transactions on Circuits and Systems I: Regular Papers, 71(10):4434–4445, 2024. 3To quantify, it will be in the order of nano-farads

    2024

  5. [5]

    A low-noise low-power chopper instrumen- tation amplifier with robust technique for mitigating chopping ripples

    Liang Fang and Ping Gui. A low-noise low-power chopper instrumen- tation amplifier with robust technique for mitigating chopping ripples. IEEE Journal of Solid-State Circuits, 57(6):1800–1811, 2022

    2022

  6. [6]

    Tianxiang Qu, Qinjing Pan, Liheng Liu, Xiaoyang Zeng, Zhiliang Hong, and Jiawei Xu. A 1.8–Gωinput-impedance 0.15–µv input- referred–ripple chopper amplifier with local positive feedback and sar-assisted ripple reduction.IEEE Journal of Solid-State Circuits, 58(3):796–805, 2023

    2023

  7. [7]

    Yongjae Park, Ji-Hyoung Cha, Su-Hyun Han, Jee-Ho Park, and Seong- Jin Kim. A 3.8-µw 1.5-nef 15-Gωtotal input impedance chopper stabilized amplifier with auto-calibrated dual positive feedback in 110- nm cmos.IEEE Journal of Solid-State Circuits, 57(8):2449–2461, 2022

    2022

  8. [8]

    Jiawei Xu, Refet Firat Yazicioglu, Bernard Grundlehner, Pieter Harpe, Kofi A. A. Makinwa, and Chris Van Hoof. A160µw8-channel active electrode system for eeg monitoring.IEEE Transactions on Biomedical Circuits and Systems, 5(6):555–567, 2011

    2011

  9. [9]

    Analog front-end input-impedance boosting techniques for bio-potential monitoring—a review.IEEE Transactions on Instrumentation and Measurement, 2024

    Feng Yan and Jingjing Liu. Analog front-end input-impedance boosting techniques for bio-potential monitoring—a review.IEEE Transactions on Instrumentation and Measurement, 2024

    2024

  10. [10]

    A high dynamic-range neural recording chopper amplifier for simultaneous neural recording and stimulation.IEEE Journal of Solid-State Circuits, 52(3):645–656, 2017

    Hariprasad Chandrakumar and Dejan Markovi ´c. A high dynamic-range neural recording chopper amplifier for simultaneous neural recording and stimulation.IEEE Journal of Solid-State Circuits, 52(3):645–656, 2017

    2017

  11. [11]

    Hariprasad Chandrakumar and Dejan Markovi ´c. An 80-mvpp linear- input range, 1.6- Gωinput impedance, low-power chopper amplifier for closed-loop neural recording that is tolerant to 650-mvpp common-mode interference.IEEE Journal of Solid-State Circuits, 52(11):2811–2828, 2017

    2017

  12. [12]

    Jiawei Xu, Srinjoy Mitra, Chris Van Hoof, Refet Firat Yazicioglu, and Kofi A. A. Makinwa. Active electrodes for wearable eeg acquisition: Re- view and electronics design methodology.IEEE Reviews in Biomedical Engineering, 10:187–198, 2017

    2017

  13. [13]

    The acquisition and application of ecg in wearable devices

    Jichen Zhu. The acquisition and application of ecg in wearable devices. In2022 International Conference on Electronics and Devices, Computational Science (ICEDCS), pages 175–178. IEEE, 2022

    2022

  14. [14]

    A high-impedance 3-mosfet pseudo-resistor for instrumentation amplifiers of biomedical sensors

    Feng Yan, Kangkang Sun, Zhipeng Li, Jian Guan, Bingjun Xiong, and Jingjing Liu. A high-impedance 3-mosfet pseudo-resistor for instrumentation amplifiers of biomedical sensors. In2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), pages 125–128, 2023

    2023

  15. [15]

    27.1 a 2.8µw 80mv pp- linear-input-range 1.6 gω-input impedance bio-signal chopper amplifier tolerant to common-mode interference up to 650mv pp

    Hariprasad Chandrakumar and Dejan Markovic. 27.1 a 2.8µw 80mv pp- linear-input-range 1.6 gω-input impedance bio-signal chopper amplifier tolerant to common-mode interference up to 650mv pp. In2017 IEEE International Solid-State Circuits Conference (ISSCC), pages 448–449. IEEE, 2017

    2017

  16. [16]

    Huijsing, and Kofi A

    Qinwen Fan, Fabio Sebastiano, Johan H. Huijsing, and Kofi A. A. Makinwa. A 1.8µw 60 nv/ √ hz capacitively-coupled chopper instrumentation amplifier in 65 nm cmos for wireless sensor nodes.IEEE Journal of Solid-State Circuits, 46(7):1534–1543, 2011

    2011

  17. [17]

    Zhijun Zhou, Longbin Zhu, Wenjie Wang, Jihong Li, Qiao Meng, and Zhigong Wang. A capacitively coupled chopper instrumentation amplifier with compensated auto-zeroed dc servo-loop for neural signal recording.IEEE Transactions on Circuits and Systems II: Express Briefs, 70(12):4314–4318, 2023

    2023