TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations | Paper Citation Record

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IEEE Micro 42, 5 (2022), 34–40

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This paper cites Computing in Science & Engineering 2, 1 (2000), 22–23.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Computing in Science & Engineering 2, 1 (2000), 22–23

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Neurocomput

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This paper cites In2021 IEEE International Symposium on Circuits and Systems (ISCAS).

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations WaferLLM: Large Language Model Inference at Wafer Scale

Reference 21

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Sparsity in Deep Learning: Pruning and growth for efficient inference and training in neural networks

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This paper cites IEEE Circuits and Systems Magazine 24, 1 (2024), 52–81.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IEEE Circuits and Systems Magazine 24, 1 (2024), 52–81

Reference 24

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This paper cites Apple vs. Oranges: Evaluating the Apple Silicon M-Series SoCs for HPC Performance and Efficiency.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Apple vs. Oranges: Evaluating the Apple Silicon M-Series SoCs for HPC Performance and Efficiency

Reference 25

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This paper cites Enabling Unstructured Sparse Acceleration on Structured Sparse Accelerators.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Enabling Unstructured Sparse Acceleration on Structured Sparse Accelerators

Reference 27

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 28

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations SIAM Rev

Reference 29

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This paper cites Acta Numerica 30 (May 2021), 555–764.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Acta Numerica 30 (May 2021), 555–764

Reference 31

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This paper cites IEEE Spectrum 61, 7 (2024), 22–27.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IEEE Spectrum 61, 7 (2024), 22–27

Reference 34

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This paper cites IEEE Circuits and Systems Magazine 23, 2 (2023), 8–28.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IEEE Circuits and Systems Magazine 23, 2 (2023), 8–28

Reference 35

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Benchmarking and Dissecting the Nvidia Hopper GPU Architecture

Reference 37

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This paper cites Scalability of 3D-DFT by block tensor-matrix multiplication on the JUWELS Cluster.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Scalability of 3D-DFT by block tensor-matrix multiplication on the JUWELS Cluster

Reference 38

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Unresolved cited work

Reference 39

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This paper cites In Proceedings of the 37th ACM International Conference on Supercomputing (Orlando, FL, USA) (ICS ’23).

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In Proceedings of the 37th ACM International Conference on Supercomputing (Orlando, FL, USA) (ICS ’23)

Reference 40

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Trends in AI Supercomputers

Reference 41

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This paper cites IEEE Trans.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IEEE Trans

Reference 42

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This paper cites University of Aizu, Japan.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations University of Aizu, Japan

Reference 44

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This paper cites Hilfer fractional advection-diffusion equations with power-law initial condition; a Numerical study using variational iteration method.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Hilfer fractional advection-diffusion equations with power-law initial condition; a Numerical study using variational iteration method

Reference 45

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In2024 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)

Reference 46

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In Proceedings of 4th Great Lakes Symposium on VLSI

Reference 47

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Technical Report Tech

Reference 48

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IEICE Transactions on Electronics E105.C, 6 (June 2022), 209–221

Reference 49

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In Parallel Processing: CONPAR 94 — VAPP VI, Bruno Buchberger and Jens V olkert (Eds.)

Reference 50

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Primer: Searching for Efficient Transformers for Language Modeling

Reference 54

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IEEE Trans

Reference 55

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Sparse-IFT: Sparse Iso-FLOP Transformations for Maximizing Training Efficiency

Reference 56

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This paper cites Concurrency: Practice and Experience 9, 4 (April 1997), 255–274.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Concurrency: Practice and Experience 9, 4 (April 1997), 255–274

Reference 57

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations https: //en.wikipedia.org/w/index.php?title=Advanced_Matrix_Extensions&oldid=1281191096

Reference 58

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This paper cites In 56th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO ’23).

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In 56th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO ’23)

Reference 60

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations S4: a High-sparsity, High-performance AI Accelerator

Reference 61

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In Proceedings of the 26th ACM International Conference on Architec- tural Support for Programming Languages and Operating Systems(Virtual, USA) (ASPLOS ’21)

Reference 62

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Unresolved cited work

Reference 1965

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations ACM Trans

Reference 1978

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations 1982), 37–46

Reference 1982

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In1985 IEEE 7th Symposium on Computer Arithmetic (ARITH)

Reference 1985

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Parallel Comput

Reference 1987

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IBM Journal of Research and Development 38, 6 (Nov

Reference 1994

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This paper cites Concurrency: Practice and Experience 9, 5 (1997), 345–389.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Concurrency: Practice and Experience 9, 5 (1997), 345–389

Reference 1997

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Reference 2000

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Unresolved cited work

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In ACM/IEEE SC 2006 Conference (SC’06)

Reference 2006

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This paper cites Chemometrics and Intelligent Laboratory Systems 85, 2 (2007), 170–178.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Chemometrics and Intelligent Laboratory Systems 85, 2 (2007), 170–178

Reference 2007

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations ACM Trans

Reference 2008

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TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Technical Report

Reference 2009

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This paper cites In 2010 39th International Conference on Parallel Processing Workshops.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In 2010 39th International Conference on Parallel Processing Workshops

Reference 2010

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Observation c78a0553-7c73-4f18-b2fb-97fd268ff94c · outbound

This paper cites IEICE Transactions on Information and Systems E94-D, 7 (2011), 1409–1418.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IEICE Transactions on Information and Systems E94-D, 7 (2011), 1409–1418

Reference 2011

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Source-reported events for the cited work

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Observation 523a0cac-0f93-464a-bd66-7ec73ab84ead · outbound

This paper cites an unresolved cited work.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Unresolved cited work

Reference 2012

Resolution: verified exact; doi, observed 2026-08-06T22:04:40.061255Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 0a417732-623a-453d-b41a-09aa8456635c · outbound

This paper cites The Johns Hopkins University Press, Baltimore, MD.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations The Johns Hopkins University Press, Baltimore, MD

Reference 2013

Resolution: unresolved; no resolver link, observed 2026-08-06T22:04:34.500909Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation b7e11868-d154-4288-a092-10766b5cf661 · outbound

This paper cites IEEE Transactions on Signal Processing 65, 13 (2017), 3551–3582.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IEEE Transactions on Signal Processing 65, 13 (2017), 3551–3582

Reference 2017

Resolution: unresolved; no resolver link, observed 2026-08-06T22:04:37.947404Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9a9041c8-b5e5-4737-9e45-07f95fad2a33 · outbound

This paper cites In 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations In 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)

Reference 2018

Resolution: unresolved; no resolver link, observed 2026-08-06T22:04:36.252843Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 802b3c41-3b16-418d-9501-64b7ff082ff0 · outbound

This paper cites Short-Dot.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Short-Dot

Reference 2019

Resolution: metadata mismatch; raw_fallback, observed 2026-08-06T22:04:44.127104Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation f0ef8453-37b8-496a-a351-8e966b50c802 · outbound

This paper cites Cybernetics and Information Technologies 20, 6 (Dec.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Cybernetics and Information Technologies 20, 6 (Dec

Reference 2020

Resolution: verified exact; doi, observed 2026-08-06T22:04:40.291893Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation a475dbcb-711e-4284-975a-5f3d4e31d8f2 · outbound

This paper cites Matrix Engines for High Performance Computing:A Paragon of Performance or Grasping at Straws?.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Matrix Engines for High Performance Computing:A Paragon of Performance or Grasping at Straws?

Reference 2021

Resolution: verified exact; local_arxiv, observed 2026-08-06T22:04:44.327790Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation e2de188c-967c-410d-85a1-9c5a4f999f50 · outbound

This paper cites IEEE Design & Test 39, 3 (2022), 91–116.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations IEEE Design & Test 39, 3 (2022), 91–116

Reference 2022

Resolution: unresolved; no resolver link, observed 2026-08-06T22:04:32.841702Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 406a83ca-c04b-4212-aa2f-7197699969a4 · outbound

This paper cites Gaussian Error Linear Units (GELUs).

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Gaussian Error Linear Units (GELUs)

Reference 2023

Resolution: unresolved; no resolver link, observed 2026-08-06T22:04:35.103154Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 83bbaacf-e7a6-4181-85ae-269fa723b9b4 · outbound

This paper cites Electronics 13, 15 (2024), 1–44.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations Electronics 13, 15 (2024), 1–44

Reference 2024

Resolution: verified exact; doi, observed 2026-08-06T22:04:41.005504Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 8d34aca4-ff7d-4090-afd0-659002d0161f · outbound

This paper cites A Survey on Error-Bounded Lossy Compression for Scientific Datasets.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations A Survey on Error-Bounded Lossy Compression for Scientific Datasets

Reference 2025

Resolution: unresolved; no resolver link, observed 2026-08-06T22:04:33.536901Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Coverage vector

Reference resolution

Outbound references

Pith citing papers