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INSIGHT: Universal Neural Simulator for Analog Circuits Harnessing Autoregressive Transformers

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arxiv 2407.07346 v3 pith:NUKTY5JG submitted 2024-07-10 cs.LG cs.CE

classification cs.LGcs.CE
keywords insightanalogdesignautomationeffectivefront-endsimulationsaccurately
verification ladder T0 review T1 audit T2 compute T3 formal
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Analog front-end design heavily relies on specialized human expertise and costly trial-and-error simulations, which motivated many prior works on analog design automation. However, efficient and effective exploration of the vast and complex design space remains constrained by the time-consuming nature of SPICE simulations, making effective design automation a challenging endeavor. In this paper, we introduce INSIGHT, a GPU-powered, technology-agnostic, effective universal neural simulator in the analog front-end design automation loop. INSIGHT accurately predicts the performance metrics of analog circuits across various technologies with just a few microseconds of inference time. Notably, its autoregressive capabilities enable INSIGHT to accurately predict simulation-costly critical transient specifications leveraging less expensive performance metric information. The low cost and high fidelity feature make INSIGHT a good substitute for standard simulators in analog front-end optimization frameworks. INSIGHT is compatible with any optimization framework, facilitating enhanced design space exploration for sample efficiency through sophisticated offline learning and adaptation techniques. Our experiments demonstrate that INSIGHT-M, a model-based batch reinforcement learning sizing framework with INSIGHT as the accurate surrogate, only requires < 20 real-time simulations with 100-1000x lower simulation costs and significant speedup over existing sizing methods.

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Cited by 2 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. AnalogFed: Privacy-Preserving Discovery of Analog Circuits at Scale with Federated Generative AI

    cs.LG 2025-07 reject novelty 6.0 of 10

    AnalogFed combines federated learning with a generative analog-topology model, adding dummy-token input perturbation and partial homomorphic encryption to resist membership inference and model inversion attacks.

  2. DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretraining

    cs.LG 2025-02 conditional novelty 6.0 of 10

    A self-supervised graph encoder for device-level circuits improves prediction of circuit similarity, delays, and op-amp performance across analog and digital designs.

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