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AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologies

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arxiv 2503.00205 v1 pith:S25T5NI5 submitted 2025-02-28 cs.LG cs.AR

Jian Gao , Weidong Cao , Junyi Yang , Xuan Zhang This is my paper · ORCID
classification cs.LGcs.AR
keywords analogdesignanaloggenietextbfcircuitgenerativeunderlineautomatic
verification ladder T0 review T1 audit T2 compute T3 formal
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abstract

The massive and large-scale design of foundational semiconductor integrated circuits (ICs) is crucial to sustaining the advancement of many emerging and future technologies, such as generative AI, 5G/6G, and quantum computing. Excitingly, recent studies have shown the great capabilities of foundational models in expediting the design of digital ICs. Yet, applying generative AI techniques to accelerate the design of analog ICs remains a significant challenge due to critical domain-specific issues, such as the lack of a comprehensive dataset and effective representation methods for analog circuits. This paper proposes, $\textbf{AnalogGenie}$, a $\underline{\textbf{Gen}}$erat$\underline{\textbf{i}}$ve $\underline{\textbf{e}}$ngine for automatic design/discovery of $\underline{\textbf{Analog}}$ circuit topologies--the most challenging and creative task in the conventional manual design flow of analog ICs. AnalogGenie addresses two key gaps in the field: building a foundational comprehensive dataset of analog circuit topology and developing a scalable sequence-based graph representation universal to analog circuits. Experimental results show the remarkable generation performance of AnalogGenie in broadening the variety of analog ICs, increasing the number of devices within a single design, and discovering unseen circuit topologies far beyond any prior arts. Our work paves the way to transform the longstanding time-consuming manual design flow of analog ICs to an automatic and massive manner powered by generative AI. Our source code is available at https://github.com/xz-group/AnalogGenie.

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Cited by 4 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. DiffCkt: A Diffusion Model-Based Hybrid Neural Network Framework for Automatic Transistor-Level Generation of Analog Circuits

    cs.ET 2025-07 conditional novelty 7.0 of 10

    DiffCkt uses three diffusion networks to predict amplifier component counts, topology, and transistor sizes from performance specifications, and reports 2.21x to 8365x higher generation efficiency than prior analog EDA tools.

  2. ParasGB: A Graph Benchmark Suite for Parasitic Estimation on AMS Circuits

    cs.LG 2026-07 conditional novelty 6.0 of 10

    ParasGB releases the first public graph benchmark for predicting post-layout parasitic capacitance and resistance from pre-layout analog/SRAM circuit schematics.

  3. AnalogFed: Privacy-Preserving Discovery of Analog Circuits at Scale with Federated Generative AI

    cs.LG 2025-07 reject novelty 6.0 of 10

    AnalogFed combines federated learning with a generative analog-topology model, adding dummy-token input perturbation and partial homomorphic encryption to resist membership inference and model inversion attacks.

  4. DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretraining

    cs.LG 2025-02 conditional novelty 6.0 of 10

    A self-supervised graph encoder for device-level circuits improves prediction of circuit similarity, delays, and op-amp performance across analog and digital designs.

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