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arxiv: 2606.11340 · v1 · pith:TU4GHFVPnew · submitted 2026-06-09 · 🪐 quant-ph

Q-DICE: Quantum Distributed Interconnect Compiler and Emulator

Pith reviewed 2026-06-27 13:11 UTC · model grok-4.3

classification 🪐 quant-ph
keywords distributed quantum computingquantum emulatornoise modelingcircuit transpilationQPU interconnectionNISQ hardware
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The pith

Q-DICE emulates distributed quantum circuits on simulators and NISQ hardware while matching experimental fidelity to within 4 percent.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper introduces Q-DICE to let researchers benchmark distributed quantum algorithms under realistic hardware constraints without needing physical systems. It builds distributed QPU backends through slicing and stitching, models nonlocal link noise via Kraus operators and stochastic channels, and applies boundary-aware mapping to respect topology during transpilation. Validation on multiple experimental circuits, including a distributed Grover search on trapped-ion hardware, shows at most 4 percent fidelity deviation from measured results. This matters because accurate emulation supports co-design of scalable distributed quantum systems before hardware exists.

Core claim

Q-DICE constitutes a distribution-aware compiler and noise-modeling engine that constructs distributed QPU backends via QPU slicing and stitching, models nonlocal links with physically motivated Kraus operators and stochastic error channels, and enforces topology constraints through boundary-aware circuit mapping, thereby reproducing real distributed quantum system behavior with a worst-case fidelity deviation of 4 percent on validated circuits.

What carries the argument

Q-DICE emulation environment, which uses QPU slicing and stitching to build backends, Kraus operators plus stochastic channels to model link noise, and boundary-aware mapping to enforce distributed topology during transpilation.

If this is right

  • Researchers without hardware access can now evaluate distribution protocols and algorithms under realistic noise and topology constraints.
  • System co-design for distributed quantum computing can proceed through simulation that faithfully reproduces experimental outcomes.
  • New interconnect and mapping strategies can be tested against the same noise models used in hardware demonstrations.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The tool could support rapid iteration on entanglement distribution methods before they reach physical testbeds.
  • Integration with existing circuit simulators might allow direct comparison of monolithic versus distributed performance on the same noise models.

Load-bearing premise

Modeling nonlocal link noise with physically motivated Kraus operators and stochastic error channels accurately captures the behavior of real distributed quantum hardware.

What would settle it

Execution of an additional experimentally realized distributed circuit on both Q-DICE and the corresponding optically linked trapped-ion hardware that produces a fidelity deviation exceeding 4 percent.

Figures

Figures reproduced from arXiv: 2606.11340 by Hans-Arno Jacobsen, Michael Silver, Zachary Vernec.

Figure 1
Figure 1. Figure 1: IBM Nairobi monolithic superconducting 27-qubit QPU topology [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 4
Figure 4. Figure 4: Stitched distributed QPU system. Green nodes indicate communication [PITH_FULL_IMAGE:figures/full_fig_p004_4.png] view at source ↗
Figure 3
Figure 3. Figure 3: Partitioned IBM Marrakesh processor. Red line indicates virtual [PITH_FULL_IMAGE:figures/full_fig_p004_3.png] view at source ↗
Figure 5
Figure 5. Figure 5: Gate teleportation circuit. The dashed box labeled “Nonlocal Link” [PITH_FULL_IMAGE:figures/full_fig_p006_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: Two-node simulated backend for gate teleportation experiment. The [PITH_FULL_IMAGE:figures/full_fig_p006_6.png] view at source ↗
Figure 8
Figure 8. Figure 8: Three-node simulated backend for GHZ state generation. Green edges [PITH_FULL_IMAGE:figures/full_fig_p007_8.png] view at source ↗
Figure 9
Figure 9. Figure 9: GHZ state fidelity across Q-DICE emulation modes and experimen [PITH_FULL_IMAGE:figures/full_fig_p007_9.png] view at source ↗
Figure 11
Figure 11. Figure 11: Balanced 4-qubit Deutsch-Jozsa circuit. In the distributed implemen [PITH_FULL_IMAGE:figures/full_fig_p008_11.png] view at source ↗
Figure 14
Figure 14. Figure 14: Ring-of-rings simulated backend. Five triangular QPU modules, [PITH_FULL_IMAGE:figures/full_fig_p009_14.png] view at source ↗
Figure 13
Figure 13. Figure 13: Success rate of the balanced Deutsch-Jozsa algorithm across four [PITH_FULL_IMAGE:figures/full_fig_p009_13.png] view at source ↗
Figure 15
Figure 15. Figure 15: Graph state fidelity on the ring-of-rings architecture across multiple [PITH_FULL_IMAGE:figures/full_fig_p010_15.png] view at source ↗
read the original abstract

As distributed quantum computing (DQC) offers a leading path towards scalable quantum computation, the ability to benchmark distributed algorithms under realistic conditions becomes critical for system co-design. However, without access to physical systems, researchers lack tools to evaluate distribution protocols. We introduce Q-DICE (Quantum Distributed Interconnect Compiler and Emulator), a hardware-aware emulation environment for benchmarking distributed quantum circuits on classical simulators and on NISQ-era monolithic hardware. This work provides three core contributions: (1) a programmatic scheme to construct distributed QPU backends, utilizing two novel techniques - QPU slicing and stitching - to facilitate distributed circuit mapping, (2) a methodology for modeling nonlocal link noise using physically motivated Kraus operators and stochastic error channels, and (3) a boundary-aware circuit mapping algorithm enforcing distributed QPU topology constraints during transpilation. Together, these components constitute a distribution-aware compiler and noise-modeling engine that faithfully enforces the physical limitations of distributed quantum hardware within existing execution environments. We validate Q-DICE against a multitude of experimentally demonstrated quantum circuits, including a distributed Grover's search on optically linked trapped-ion hardware, achieving a worst-case fidelity deviation of 4% between simulated and experimental results. These findings demonstrate Q-DICE's capacity to accurately reproduce real distributed quantum system behavior across platforms, streamlining experimentation with distributed quantum algorithms and architectures.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 1 minor

Summary. The manuscript introduces Q-DICE, a hardware-aware emulation environment and compiler for distributed quantum circuits. It describes three contributions: (1) a programmatic scheme for constructing distributed QPU backends via QPU slicing and stitching, (2) modeling of nonlocal link noise via physically motivated Kraus operators and stochastic error channels, and (3) a boundary-aware circuit mapping algorithm. The central claim is that Q-DICE accurately reproduces real distributed quantum hardware behavior, validated on multiple experimentally demonstrated circuits including a distributed Grover's search on optically linked trapped-ion hardware, with a reported worst-case fidelity deviation of 4%.

Significance. If the validation details hold and the noise model is shown to be predictive rather than fitted post hoc, the tool could provide a practical resource for co-design of distributed quantum algorithms and architectures by allowing simulation of realistic interconnect constraints on classical or monolithic NISQ hardware. The explicit comparison to experimental data is a positive feature, but the current presentation does not yet establish the result as robust.

major comments (2)
  1. [Abstract / Validation section] Abstract (and validation/results section): the central claim of faithful reproduction of real distributed hardware rests on a reported worst-case fidelity deviation of 4% across 'a multitude of experimentally demonstrated quantum circuits.' No information is supplied on the number of circuits tested, the distribution of deviations, error bars, how many shots or repetitions were used, or whether the noise-model parameters were chosen independently of the validation data. This information is required to assess whether the 4% figure supports the claim that the Kraus-operator and stochastic-channel methodology accurately captures real hardware.
  2. [Noise modeling section] Methodology for nonlocal link noise (presumably § on noise modeling): the paper states that the model uses 'physically motivated Kraus operators and stochastic error channels,' but without derivation of the specific operators, their parameter sources (e.g., measured T1/T2 of the interconnect or ab-initio calculation), or an ablation showing that simpler depolarizing models would not suffice, it is not possible to evaluate whether the modeling choice is load-bearing or merely descriptive.
minor comments (1)
  1. [Abstract] The abstract refers to 'existing execution environments' without naming which simulators or hardware backends (e.g., Qiskit, Cirq, or specific trapped-ion emulators) were used for the reported experiments.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for their detailed and constructive comments on our manuscript introducing Q-DICE. We address each of the major comments point-by-point below, with commitments to revisions that will enhance the clarity and robustness of our validation and noise modeling sections.

read point-by-point responses
  1. Referee: [Abstract / Validation section] the central claim of faithful reproduction of real distributed hardware rests on a reported worst-case fidelity deviation of 4% across 'a multitude of experimentally demonstrated quantum circuits.' No information is supplied on the number of circuits tested, the distribution of deviations, error bars, how many shots or repetitions were used, or whether the noise-model parameters were chosen independently of the validation data. This information is required to assess whether the 4% figure supports the claim.

    Authors: We agree that these details are essential for rigorously supporting our claims. In the revised manuscript, we will expand the validation section to specify the number of circuits tested, provide the distribution of fidelity deviations along with error bars, report the number of shots and repetitions used in both simulation and experiment, and clarify that the noise model parameters were derived from independent experimental characterizations of the interconnect (such as measured coherence times) and not fitted to the validation data. This will allow readers to better evaluate the predictive power of our approach. revision: yes

  2. Referee: [Noise modeling section] the paper states that the model uses 'physically motivated Kraus operators and stochastic error channels,' but without derivation of the specific operators, their parameter sources (e.g., measured T1/T2 of the interconnect or ab-initio calculation), or an ablation showing that simpler depolarizing models would not suffice, it is not possible to evaluate whether the modeling choice is load-bearing or merely descriptive.

    Authors: The referee raises a valid point regarding the need for greater transparency in our noise modeling methodology. We will revise the noise modeling section to include the explicit derivation of the Kraus operators based on the physical characteristics of the nonlocal links, specify the sources of the parameters (drawn from measured T1/T2 times and other hardware metrics from the referenced experiments), and add an ablation study comparing our model to a standard depolarizing channel. This will demonstrate that the physically motivated model provides superior fidelity matching and is indeed load-bearing for accurate emulation. revision: yes

Circularity Check

0 steps flagged

No significant circularity detected

full rationale

The provided abstract and context describe Q-DICE as a hardware-aware emulator validated directly against external experimental results on distributed quantum circuits (e.g., optically linked trapped-ion Grover search with 4% worst-case fidelity deviation). No equations, derivation steps, fitted parameters presented as predictions, or self-citations are visible in the text. The central claims rely on external benchmarks and physically motivated noise models without reduction to self-definition or internal fits. This is the expected self-contained case.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

With only the abstract available, no specific free parameters, axioms, or invented entities can be identified; the work relies on standard quantum information concepts.

pith-pipeline@v0.9.1-grok · 5763 in / 1040 out tokens · 24936 ms · 2026-06-27T13:11:03.315423+00:00 · methodology

discussion (0)

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Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score.

  1. Towards an Optimally Distributed Quantum Fourier Transform Circuit

    quant-ph 2026-06 unverdicted novelty 4.0

    Presents an optimal gate-packing partitioning scheme for the QFT that aims to minimize e-bit count in distributed quantum systems and validates it on hardware.

Reference graph

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