Paper Citation Record · LEDGER

MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation

As of 19 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 6 inbound Pith citation observations for arXiv:2407.01910.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2407.01910 v2

Coverage vector

measured 0 of 0 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links

measured 6 of 6 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-19T06:32:44.657259+00:00

measured 6 of 6 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-11T16:50:14.694942Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-06-29T18:53:51.275719Z

Reference resolution

0 of 0 outbound references displayed

verified exact0
verified fuzzy0
unresolved0
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

No outbound reference observations are available for this paper version.

Pith citing papers

Observation 6baacd1a-89df-4495-8481-37763c42c676 · inbound

AiEDA: Agentic AI Design Framework for Digital ASIC System Design cites this paper.

AiEDA: Agentic AI Design Framework for Digital ASIC System Design MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation

Reference 8

Resolution: unresolved; no resolver link, observed 2026-08-11T16:50:14.694942Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 4ad2bf82-372a-4604-9876-94bfd7ac9336 · inbound

hdl2v: A Code Translation Dataset for Enhanced LLM Verilog Generation cites this paper.

hdl2v: A Code Translation Dataset for Enhanced LLM Verilog Generation MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation

Reference 2024

Resolution: unresolved; no resolver link, observed 2026-08-07T10:45:07.112196Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2bfb09c1-36c3-425a-80c4-61964f959cc9 · inbound

RealBench: Benchmarking Verilog Generation Models with Real-World IP Designs cites this paper.

RealBench: Benchmarking Verilog Generation Models with Real-World IP Designs MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation

Reference 6

Resolution: unresolved; no resolver link, observed 2026-08-06T15:19:52.391272Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation abbd5ceb-0abd-48ab-9a6f-56eac6e079f9 · inbound

HLSDebugger: Identification and Correction of Logic Bugs in HLS Code with LLM Solutions cites this paper.

HLSDebugger: Identification and Correction of Logic Bugs in HLS Code with LLM Solutions MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation

Reference 12

Resolution: unresolved; no resolver link, observed 2026-08-06T12:46:40.784054Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 76c72a40-dea1-45eb-bd45-ee1ab929465f · inbound

Bridging Generation and Training: A Systematic Review of Quality Issues in LLMs for Code cites this paper.

Bridging Generation and Training: A Systematic Review of Quality Issues in LLMs for Code MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation

Reference 152

Resolution: verified exact; arxiv_id, observed 2026-05-11T17:26:04.516231Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 4eb87482-feb0-4f68-a339-b43cdb218134 · inbound

Verilog-Evolve: Feedback-Driven and Skill-Evolving Verilog Generation cites this paper.

Verilog-Evolve: Feedback-Driven and Skill-Evolving Verilog Generation MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation

Reference 8

Resolution: verified exact; arxiv_id, observed 2026-06-29T18:53:51.277813Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.