Recognition: unknown
Micro light-emitting diode
Pith reviewed 2026-05-06 20:40 UTC · model claude-sonnet-4-6
The pith
A single micro LED footprint houses two vertically stacked, independently addressable light-emitting junctions by crossing their polarity contacts and routing drive current through side-running conductive bumps to a substrate below.
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
Core claim
The patent claims a micro LED in which two light-emitting junctions are vertically integrated with intentionally crossed polarity contacts — the second emitter's n-type electrode placed on the first emitter's p-type electrode, and the second emitter's p-type electrode placed on the first emitter's n-type electrode. Side-running conductive bumps then map each polarity pair to distinct substrate-level conductors, creating a four-terminal structure addressable from below. Because the first (lower) active area is larger than the second (upper), the geometry tolerates the lateral space consumed by the conductive bumps while maintaining useful emitting area in both junctions.
What carries the argument
The crossed-polarity vertical stack is the load-bearing mechanism: by swapping which polarity of the upper emitter connects to which polarity of the lower emitter, the structure creates two electrically distinct circuits within a single mesa. The side-running conductive bump set then acts as the wiring layer that maps those two circuits to separate substrate electrodes, replacing top-side access with below-substrate addressing. Without the polarity cross, both circuits would share the same net bias and independent control would be impossible.
If this is right
- A single pixel footprint can carry two independently driven emitters, enabling multi-wavelength or variable-intensity output without expanding pixel pitch.
- Eliminating top-side wire bonds in favour of below-substrate conductive layer routing is directly compatible with the flip-chip mass-transfer processes used in micro LED display manufacturing.
- The larger lower active area principle provides a geometric template for stacking emitters of different areas while preserving total light output across both junctions.
- The architecture is material-agnostic at the junction level, so different semiconductor systems (emitting at different wavelengths) could occupy the two stack positions, opening a path toward a two-colour monolithic pixel.
Where Pith is reading between the lines
- Extending the same crossed-polarity stacking logic to three junctions with red, green, and blue emitters would, in principle, yield a monolithic full-colour micro LED pixel — the central unsolved packaging problem for micro LED displays — though thermal and lattice-mismatch constraints between III-nitride and III-phosphide systems would need separate solutions.
- The crossed-polarity contact geometry is effectively a passive routing trick that converts a two-terminal assumption into a four-terminal device; the same principle could apply to stacked photodetectors, tandem solar cells, or other vertical optoelectronic structures that need independent terminal access without top-side contacts.
- Because the reverse-biased junction sits in the optical path of the forward-biased one, wavelength selection of the two emitters will interact with sub-bandgap absorption windows — a design constraint the patent does not address but which would need careful bandgap engineering in a real implementation.
Load-bearing premise
The design assumes that when one emitter is forward-biased, the reverse-biased junction of the other emitter neither passes significant leakage current nor absorbs enough of the forward-biased emitter's light to undermine the device — an assumption left untested by any electrical or optical characterization in the available text.
What would settle it
Measure the electroluminescence efficiency of each emitter independently while the other is held at its reverse-bias condition, and simultaneously record the reverse-bias leakage current as a function of applied voltage. If leakage is large relative to forward current, or if external quantum efficiency of the active emitter drops measurably when the other junction is reverse-biased, the dual-emitter premise fails. Conversely, if both emitters operate at near-isolated efficiency with low leakage, the architecture is validated.
Figures
read the original abstract
1 . A micro light-emitting diode, comprising: a substrate; a conductive layer, including a first electrode and a second electrode disposed on said substrate apart; a light-emitting assembly, disposed on said conductive layer, said light-emitting assembly including: a first light-emitting semiconductor, including a first light-emitting element, a first n-type electrode, and a first p-type electrode, a side of said first light-emitting element disposed on said conductive layer, said first n-type electrode and said first p-type electrode disposed on another side of said first light-emitting element, said first light-emitting element including a first light-emitting layer, and said first light-emitting layer including a first area; and a second light-emitting semiconductor, disposed vertically on said first light-emitting semiconductor, including a second light-emitting element, a second n-type electrode, and a second p-type electrode, said second n-type electrode disposed on said first p-type electrode, said second p-type electrode disposed on said first n-type electrode, said second light-emitting element disposed on said second p-type electrode and said second n-type electrode, said second light-emitting element including a second light-emitting layer, said second light-emitting layer including a second area, and said first area greater than said second area; and a conductive bump set, including a first conductive bump and a second conductive bump, an end of said first conductive bump disposed on the said electrodes and extending to a side of said first n-type electrode and a side of said second p-type electrode, an end of said second conductive bump disposed on said second electrodes and extending to a side of said first p-type electrode and a side of said second n-type
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The patent discloses a micro light-emitting diode comprising two vertically stacked light-emitting semiconductors with a deliberately crossed polarity arrangement: the second n-type electrode is bonded to the first p-type electrode and the second p-type electrode is bonded to the first n-type electrode. The first (lower) light-emitting layer has a larger active area than the second (upper). Two conductive bumps route the interconnected electrode pairs laterally to a substrate conductive layer, enabling bottom-side electrical addressing of each emitter independently. The stated purpose is a compact, self-contained dual-emitter pixel for micro-display applications. Only the independent claim (Claim 1) and its abstract-level description are available for review; no embodiment drawings, no detailed description, and no experimental data accompany the text reviewed here.
Significance. If demonstrated to be functional, the crossed-polarity stacked micro-LED architecture addresses a genuine engineering challenge in micro-display technology: integrating two independently addressable emitters into a single sub-pixel footprint without lateral area penalty. Compact dual-color or redundant-emitter pixels are commercially relevant for AR/VR and high-density display panels. The conductive-bump lateral routing scheme is a structurally elegant solution to the substrate-contact problem. However, the significance of the contribution hinges entirely on whether the claimed structure operates without unacceptable optical or electrical cross-interference between the stacked junctions — a question the available text leaves unanswered. No machine-checked proofs, simulation results, fabricated-device data, or reproducible characterization are present. The claim is therefore structurally novel but operationally unvalidated within this disclosure.
major comments (3)
- [Claim 1 — crossed-polarity stacking, optical path] When LED1 (lower, forward-biased) emits, LED2 (upper, reverse-biased) lies directly in the optical path above it. If the bandgap of LED2's active material is less than or equal to LED1's peak photon energy, LED2 will absorb a substantial fraction of LED1's output. Absorption coefficients in III-nitride or III-phosphide quantum-well stacks near their bandgap edge are typically 10³–10⁴ cm⁻¹; even 100–200 nm of effective absorber thickness removes a non-negligible photon fraction. The claim imposes no wavelength or bandgap ordering constraint between the two emitters. A design intent of LED2 bandgap > LED1 bandgap (e.g., blue above red) would render LED2 substantially transparent to LED1's emission and dissolve the concern — this is a standard principle in monolithic multi-color stacks — but the claim as written admits the opposite ordering. This gap is load-bearing: without a bandgap hiera
- [Claim 1 — reverse-bias operation, electrical characterization] The crossed-polarity scheme requires that whichever junction is not being driven is reverse-biased at a voltage comparable to the forward bias of the active junction (typically 2.5–3.5 V for nitrides). No reverse-breakdown voltage, leakage current density, or device degradation data are provided. For micro-LED dimensions (sub-100 µm pitch), surface and perimeter leakage paths can dominate and the reverse junction may not be a simple open circuit. The claim should either specify minimum reverse breakdown requirements or reference an embodiment demonstrating acceptable leakage under normal operating conditions. As written, the claim is silent on whether the reverse-biased junction is a passive element or a dominant loss mechanism.
- [Claim 1 — conductive bump isolation] The first conductive bump is described as running along the side of the first n-type electrode and the side of the second p-type electrode simultaneously; the second conductive bump runs along the side of the first p-type electrode and the side of the second n-type electrode. For this routing to function without shorting adjacent electrodes on the same semiconductor layer, the bumps must be electrically isolated from the layers they pass alongside. No passivation, insulation, or isolation structure is claimed or described anywhere in the available text. This is a load-bearing structural requirement for the device to function as claimed, and its absence from the claim constitutes a gap in the disclosure.
minor comments (3)
- [Claim 1 — text truncation] The abstract text cuts off mid-sentence at '...extending to a side of said first p-type electrode and a side of said second n-type' — the second conductive bump definition is incomplete. The full claim language should be confirmed and supplied for a complete assessment.
- [Claim 1 — area relationship] The requirement that the first active area be strictly greater than the second is stated but not quantified or motivated. A brief note on the functional reason for this dimensional hierarchy (e.g., to ensure the lateral bump routing geometry is feasible, or to reduce optical shadowing) would clarify whether this is a critical structural constraint or a preferred embodiment.
- [General — absence of figures and detailed description] No drawings or detailed description are available for review. Assessment of the conductive bump geometry, the junction stack layer order, and the substrate contact arrangement is based solely on the claim language. Any revision should ensure that at least the structural cross-section and the electrical schematic equivalent are accessible to reviewers.
Simulated Author's Rebuttal
We thank the referee for a technically rigorous and substantive review. We recognize that the text available for review — Claim 1 and an abstract-level summary — represents only a portion of the complete patent disclosure; the detailed description, embodiment figures, and dependent claims constitute the remainder of the disclosure and address several of the raised issues in more detail. Nevertheless, we accept that an independent claim must be self-sufficient and that the gaps identified by the referee in Claim 1 are genuine. We respond point by point below and commit to concrete revisions for each load-bearing deficiency. Where the referee's critique is correct and the claim language is deficient, we say so and describe the planned remedy. We do not dispute the referee's technical reasoning on any of the three major points; the disagreements, where they exist, are about the degree to which standard-practice assumptions in semiconductor fabrication can be relied upon versus explicitly claimed.
read point-by-point responses
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Referee: Claim 1 imposes no wavelength or bandgap ordering constraint between the two stacked emitters. If LED2's bandgap ≤ LED1's peak photon energy, LED2 will absorb a substantial fraction of LED1's output (absorption coefficients ~10³–10⁴ cm⁻¹ near the bandgap edge). A design with higher-bandgap LED2 above lower-bandgap LED1 would render LED2 transparent to LED1 emission, but the claim as written admits the opposite, absorptive ordering. The referee characterizes this as a load-bearing gap.
Authors: The referee's analysis is correct. Claim 1 as written is silent on the relative bandgap or emission wavelength of the two stacked emitters, and the absorptive ordering is physically possible within the claim scope. The intended application — dual-color or redundant-emitter micro-display pixels — assumes that the upper emitter (LED2) has equal or higher bandgap than the lower emitter (LED1), making LED2 substantially transparent to LED1's emission. This design intent is reflected in the detailed description and embodiment figures that accompany the full disclosure but were not available to the referee. We agree, however, that an independent claim must be self-contained on load-bearing structural and operational constraints. We will revise Claim 1 to explicitly require that the peak emission wavelength of the second light-emitting layer is shorter than or equal to that of the first light-emitting layer (equivalently, second bandgap ≥ first bandgap), and will introduce a dependent claim specifying specific wavelength pairings representative of demonstrated embodiments. This revision directly addresses the referee's concern without narrowing the claim beyond its intended scope. revision: yes
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Referee: The crossed-polarity scheme requires the non-driven junction to sustain reverse bias comparable to the forward operating voltage (~2.5–3.5 V for nitrides). No reverse-breakdown voltage, leakage current density, or degradation data are provided. At sub-100 µm pitch, surface and perimeter leakage can dominate, and the reverse junction may not behave as a passive open circuit. The claim is silent on whether the reverse-biased junction is a passive element or a dominant loss mechanism.
Authors: The referee's concern is technically well-founded and we do not dispute it. For well-fabricated III-nitride micro-LEDs, reverse breakdown voltages typically exceed 10 V — substantially above the ~3 V forward operating voltage — and bulk reverse leakage current densities at sub-breakdown bias are orders of magnitude below forward operating current densities. However, this reasoning is not captured in Claim 1, and perimeter/surface leakage at sub-100 µm dimensions is process-dependent and can vary significantly. We agree that the claim, as available, provides no electrical constraint that guarantees acceptable behavior of the reverse-biased junction. We will revise the disclosure to include, in the detailed description, representative leakage current and reverse breakdown data from fabricated embodiments. We will also add a dependent claim specifying a minimum reverse breakdown voltage requirement (referenced to the forward operating voltage of the active junction) and a maximum permissible reverse leakage current density, making the operational requirement explicit and independently verifiable. revision: yes
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Referee: The first conductive bump runs alongside the first n-type electrode and the second p-type electrode simultaneously; the second runs alongside the first p-type electrode and the second n-type electrode. For this routing to avoid shorting adjacent electrodes, the bumps must be electrically isolated from the layers they pass alongside. No passivation, insulation, or isolation structure is claimed or described anywhere in the available text. The referee characterizes this as a load-bearing structural requirement whose absence constitutes a gap in the disclosure.
Authors: The referee is correct. Electrical isolation of the conductive bumps from the electrode layers they traverse laterally is structurally necessary for the device to function as claimed, and this isolation is not recited anywhere in Claim 1 or the available claim text. We acknowledge that sidewall passivation — typically a conformal dielectric such as SiO₂ or SiNₓ deposited prior to bump formation — is standard practice in III-nitride device processing and would be understood by a person of ordinary skill in the art. However, reliance on implied knowledge of ordinary skill is insufficient when the isolation structure is a load-bearing enabler of the primary functional claim. We will revise Claim 1 to explicitly recite an insulating layer disposed between each conductive bump and the electrode surfaces it passes alongside, and will add a dependent claim specifying suitable dielectric materials and their placement. The embodiment drawings in the full disclosure depict this structure and will be explicitly cross-referenced in the revised independent claim language. revision: yes
Circularity Check
No circularity: this is a structural device patent with no derivation chain to evaluate
full rationale
The document is a utility patent whose claims describe a physical device architecture — a vertically stacked dual-emitter micro LED with crossed-polarity contacts and lateral conductive bumps. There is no derivation chain, no fitted parameter, no equation, and no self-citation. Patent claims assert structural configurations ("the second n-type electrode disposed on the first p-type electrode…"), not mathematical or physical derivations, and therefore cannot be circular in any of the seven enumerated senses. The only "inference" implicit in the claim is that the described structural arrangement produces a functional dual-emitter addressable pixel, but this is a patent enablement assertion, not a logical step that reduces to its own inputs by construction. The reader's and skeptic's concerns — reverse-bias leakage, junction degradation, optical absorption by the upper emitter when the lower is forward-biased — are legitimate engineering and enablement concerns (correctness risk), but they are not instances of circularity: no predicted quantity is computed from a parameter fitted to that same quantity, no uniqueness theorem self-imports, and no known result is merely renamed. With only the abstract available and no derivation present even there, the honest finding is zero circularity.
Axiom & Free-Parameter Ledger
axioms (2)
- domain assumption A reverse-biased LED junction in the stack does not short, excessively leak, or optically absorb the forward-biased emitter output under operating conditions.
- domain assumption The conductive bumps on the sides of the stack make reliable ohmic contact to both electrode pairs without shorting adjacent electrodes of opposite polarity.
discussion (0)
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