Display apparatus
Pith reviewed 2026-05-06 21:28 UTC · model grok-4.3
The pith
A display apparatus integrates a conductive partition between LED sub-pixels that also serves as the shared first electrode.
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
Core claim
The display apparatus comprises a circuit board with a driving circuit and a pixel array in which a semiconductor stack contains a first conductivity-type semiconductor layer whose upper surface is the light emission surface and LED cells formed on its lower surface, each cell made of an active layer and second conductivity-type semiconductor layer. A conductive partition structure placed between the sub-pixel spaces contacts the upper surface of the first conductivity-type layer and serves as the first electrode. Wavelength conversion portions occupy the sub-pixel spaces, a common electrode on one side of the stack connects electrically to an edge of the partition and to the driving circuit
What carries the argument
The conductive partition structure, which both separates adjacent sub-pixel spaces and electrically contacts the upper surface of the first conductivity-type semiconductor layer to act as the shared first electrode for all LED cells.
If this is right
- Each sub-pixel receives its own second electrode on the bottom of its LED cell, allowing individual brightness control while the partition supplies the common first electrode connection.
- Wavelength conversion material is confined inside each sub-pixel space, converting the light from the underlying monochromatic LED cell into the desired color before it exits the top surface.
- The common electrode attaches to only one edge region of the partition, routing the return path for all sub-pixels through the existing conductive walls rather than through separate top contacts.
- An additional pad electrode placed outside the common electrode provides a further electrical interface to the driving circuit on the circuit board.
- The entire pixel array sits directly on the circuit board, integrating emission, color conversion, and all electrode connections into a single vertical structure.
Where Pith is reading between the lines
- The partition-electrode approach could reduce the lateral footprint per pixel compared with designs that place separate n-contacts beside each cell, potentially supporting higher pixel density.
- Optical crosstalk between sub-pixels would depend on whether the partition walls are made reflective or absorbing; this property is not specified and would need separate verification.
- The same partition-and-common-electrode layout might be adapted to other vertical LED stacks, such as those used in sensors or structured lighting, where shared top contacts are desirable.
- Yield in manufacturing would hinge on uniform height and conductivity of the partition walls across large arrays, an aspect left unaddressed in the abstract description.
Load-bearing premise
The described stack, partition walls, and electrode layout can be fabricated without creating electrical shorts between neighboring cells or causing significant optical losses at the partition interfaces.
What would settle it
Fabricate a small test array of three or more adjacent sub-pixels according to the stack and partition geometry, then apply drive current to only one second electrode while measuring light output and current leakage from the neighboring cells to check for independent control and absence of shorts.
Figures
read the original abstract
1 . A display apparatus comprising: a circuit board comprising a driving circuit; and a pixel array comprising a plurality of pixels provided on the circuit board, each of the plurality of pixels having a plurality of sub-pixels, wherein the pixel array comprises: a semiconductor stack comprising a first conductivity-type semiconductor layer having an upper surface provided as a light emission surface and light-emitting diode (LED) cells arranged on a lower surface of the first conductivity-type semiconductor layer, the LED cells respectively constituting the plurality of sub-pixels, and each of the LED cells comprising an active layer and a second conductivity-type semiconductor layer stacked sequentially on the lower surface of the first conductivity-type semiconductor layer; a conductive partition structure between sub-pixel spaces, respectively overlapping the LED cells, on the semiconductor stack, connected to the upper surface of the first conductivity-type semiconductor layer, and provided as a first electrode; wavelength conversion portions, respectively provided in the sub-pixel spaces; a common electrode provided on at least one side of an upper surface of the semiconductor stack and electrically connected to an edge region of the conductive partition structure and the driving circuit; second electrodes, respectively provided on lower surfaces of the LED cells and connected to the second conductivity-type semiconductor layer, each of the second electrodes being electrically connected to the driving circuit; and a pad electrode provided on an outer side of the common electrode and electrically connected to the driving circuit.
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The manuscript presents a patent claim for a display apparatus comprising a circuit board with driving circuit and a pixel array of micro-LED sub-pixels. The key features include a semiconductor stack with a continuous first conductivity-type layer (upper surface as light emission surface), LED cells (active layer + second conductivity-type layer) on its lower surface, a conductive partition structure between sub-pixel spaces that contacts the first conductivity-type layer and serves as common first electrode, wavelength conversion portions in the sub-pixel spaces, a side common electrode connected to the partition edge and driving circuit, individual second electrodes on the lower surfaces of the LED cells connected to the driving circuit, and an outer pad electrode.
Significance. If realized, the architecture could simplify electrode routing and current spreading in dense micro-LED arrays by using a grid-like conductive partition for common top-side contact while enabling individual bottom-side pixel control. This might improve uniformity and integration density. However, absent any electrical, optical, fabrication, or simulation data, the practical advantages and feasibility remain unverified and speculative.
major comments (1)
- [Abstract (Claim 1)] Abstract (Claim 1): The central structural claim assumes that the conductive partition can be fabricated and electrically contacted to the upper surface of the first conductivity-type semiconductor layer across the array while accommodating wavelength converters in the sub-pixel spaces without shorts, optical losses, or current crowding. No materials, dimensions, process steps, or validation (experimental or simulated) are supplied to support this load-bearing assumption of functionality.
minor comments (2)
- [Abstract] The description is presented as a single, extremely long sentence typical of patent claims; this reduces readability. Division into multiple claims or inclusion of schematic cross-sections would aid clarity.
- No references to prior micro-LED electrode or partition architectures are provided, nor any discussion of comparative advantages.
Simulated Author's Rebuttal
We thank the referee for reviewing our patent application and for the constructive comment. This document is a structural patent claim (Claim 1) rather than a scientific manuscript containing experimental results. Patent claims define the inventive architecture at a functional level; enablement details reside in the full specification (not reproduced in the excerpt provided to the referee). We address the single major comment below.
read point-by-point responses
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Referee: [Abstract (Claim 1)] Abstract (Claim 1): The central structural claim assumes that the conductive partition can be fabricated and electrically contacted to the upper surface of the first conductivity-type semiconductor layer across the array while accommodating wavelength converters in the sub-pixel spaces without shorts, optical losses, or current crowding. No materials, dimensions, process steps, or validation (experimental or simulated) are supplied to support this load-bearing assumption of functionality.
Authors: We respectfully note that a patent claim is not required to recite materials, dimensions, process steps, or performance data; those elements belong in the detailed description and drawings of the full application. Claim 1 defines a novel electrode architecture in which a conductive partition simultaneously (i) physically separates sub-pixel volumes, (ii) forms a continuous low-resistance contact to the upper surface of the first-conductivity-type layer, and (iii) serves as the common first electrode routed to the driving circuit via a side common electrode. A practitioner skilled in micro-LED fabrication would recognize that standard techniques—selective etching of the LED stack to define sub-pixel mesas, conformal deposition of a conductive film (e.g., ITO, thin metal, or doped semiconductor) on the exposed upper surface and sidewalls, and subsequent filling of the resulting trenches with wavelength-converting material—can realize the claimed structure without creating shorts between adjacent sub-pixels. Optical losses and current crowding are addressed by the very topology of the claim: the partition provides distributed top-side current injection while the individual bottom electrodes enable per-sub-pixel drive. Because the claim accurately captures the inventive concept and does not purport to teach a specific process recipe, we do not believe revision of the claim language is warranted. revision: no
- Supplying experimental, simulation, or detailed process data to demonstrate absence of shorts, optical losses, or current crowding, because the provided manuscript contains only the claim text and no accompanying specification or results section.
Circularity Check
No derivation chain or fitted result exists
full rationale
The document is a patent claim that enumerates physical components of a micro-LED display stack (common top electrode via conductive partition, pixelated bottom contacts, wavelength-conversion wells). No equations, no first-principles derivation, no parameter fitting, and no predictions are present. Consequently none of the enumerated circularity patterns (self-definitional, fitted-input-called-prediction, self-citation load-bearing, etc.) can occur. The structure is simply asserted as an invention; its validity is a matter of enablement and novelty, not logical circularity.
discussion (0)
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