Packed layouts and extensions to tiling/fusion/vectorization in MLIR/IREE enable VLA ML code generation for SVE, achieving up to 1.45x speedup over NEON and outperforming PyTorch frameworks while scaling with vector length.
In2021 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)(2021), pp
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Scalable Packed Layouts for Vector-Length-Agnostic ML Code Generation
Packed layouts and extensions to tiling/fusion/vectorization in MLIR/IREE enable VLA ML code generation for SVE, achieving up to 1.45x speedup over NEON and outperforming PyTorch frameworks while scaling with vector length.