PoTAcc delivers an end-to-end pipeline and three shift-PE FPGA accelerators for PoT-quantized DNNs that deliver up to 3.6x speedup and 78% energy reduction versus CPU-only runs on PYNQ-Z2 and Kria boards.
S 3: Sign-Sparse-Shift Reparametrization for Effective Training of Low-Bit Shift Networks
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PoTAcc: A Pipeline for End-to-End Acceleration of Power-of-Two Quantized DNNs
PoTAcc delivers an end-to-end pipeline and three shift-PE FPGA accelerators for PoT-quantized DNNs that deliver up to 3.6x speedup and 78% energy reduction versus CPU-only runs on PYNQ-Z2 and Kria boards.