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arxiv: 2606.06630 · v1 · pith:A4HJNZBDnew · submitted 2026-06-04 · ⚛️ physics.acc-ph · astro-ph.IM

Low Level RF and Timing System Design for the Cool Copper Collider

Chao Liu , Ankur Dhar , Martin Breidenbach , Emilio Nanni This is my paper

Pith reviewed 2026-06-27 22:26 UTC · model grok-4.3

classification ⚛️ physics.acc-ph astro-ph.IM
keywords low-level RFLLRFRFSoCCool Copper ColliderC3timing systemhigh-power testbeam loading
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The pith

An RFSoC-based NG-LLRF system samples RF signals directly and mixes them digitally to stabilize cavity fields in the 10 km C3 collider.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper presents a next-generation low-level RF control system for the Cool Copper Collider, a compact normal-conducting linear accelerator spanning 10 km with 2200 RF stations to enable Higgs studies at 250 and 550 GeV center of mass. The design integrates sampling and mixing on a single chip to keep the hardware compact while compensating pulse-to-pulse variations and intra-pulse beam loading effects. Characterization in loopback mode plus high-power tests with a prototype standing-wave structure reached 16.45 MW peak power across multiple modulation schemes. A sympathetic reader cares because the collider requires field stability tight enough to preserve beam quality over thousands of stations; failure here would prevent the machine from meeting its energy and luminosity goals.

Core claim

The authors describe the NG-LLRF architecture that samples RF signals directly at the cavity and performs all mixing and control digitally via RFSoC technology. The system was evaluated first in loopback configuration and then integrated with a C3 prototype standing-wave accelerating structure, delivering stable operation at peak powers up to 16.45 MW for square pulses, phase-reversal pulses, and pulse trains while compensating beam-loading transients.

What carries the argument

The NG-LLRF controller built on radio frequency system-on-chip (RFSoC) technology, which performs direct RF sampling and digital down-conversion to regulate cavity phase and amplitude.

If this is right

  • The digital mixing approach compensates intra-pulse beam loading without analog hardware.
  • Pulse-to-pulse stability is maintained by dedicated control at each of the 2200 cavities.
  • Higher integration reduces the physical footprint and cost per RF station for large accelerators.
  • The tested modulation schemes support the variable pulse formats needed for C3 operation at both 250 and 550 GeV.
  • The timing distribution architecture synchronizes all stations over the 10 km length.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • If the per-station stability holds at full scale, the same architecture could be reused for other normal-conducting high-gradient linacs without redesigning the control layer.
  • The direct-sampling method may allow tighter feedback bandwidths than traditional analog mixing chains, potentially relaxing cavity design tolerances.
  • Extending the high-power tests to include simultaneous operation of several structures under realistic beam current would directly test the scaling assumption.
  • The timing system described may also serve as a template for synchronizing distributed RF sources in future compact collider concepts.

Load-bearing premise

Performance measured in loopback and single-structure tests at 16.45 MW will continue to meet phase and amplitude tolerances when the same hardware is replicated across 2200 stations under realistic beam loading in a full 10 km LINAC.

What would settle it

A measurement showing phase or amplitude excursions beyond the C3 tolerance limits during simultaneous operation of multiple stations with beam-induced loading would demonstrate that the demonstrated loopback and prototype results do not scale.

Figures

Figures reproduced from arXiv: 2606.06630 by Ankur Dhar, Chao Liu, Emilio Nanni, Martin Breidenbach.

Figure 2
Figure 2. Figure 2: The NG-LLRF can be triggered by external trigger [PITH_FULL_IMAGE:figures/full_fig_p002_2.png] view at source ↗
Figure 1
Figure 1. Figure 1: The conceptual block diagram of a single NG-LLRF module for C [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: The front panel of the prototype NG-LLRF chassis. [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: The back panel of the prototype NG-LLRF chassis. [PITH_FULL_IMAGE:figures/full_fig_p003_3.png] view at source ↗
Figure 5
Figure 5. Figure 5: The magnitude and phase of baseband pulses from the [PITH_FULL_IMAGE:figures/full_fig_p004_5.png] view at source ↗
Figure 4
Figure 4. Figure 4: The inside layout of the prototype NG-LLRF chassis. [PITH_FULL_IMAGE:figures/full_fig_p004_4.png] view at source ↗
Figure 6
Figure 6. Figure 6: The magnitude and phase of baseband pulses from the [PITH_FULL_IMAGE:figures/full_fig_p005_6.png] view at source ↗
Figure 8
Figure 8. Figure 8: The magnitude and phase of baseband pulses from the [PITH_FULL_IMAGE:figures/full_fig_p005_8.png] view at source ↗
Figure 9
Figure 9. Figure 9: The magnitude and phase of the SSA output in 100 ns [PITH_FULL_IMAGE:figures/full_fig_p006_9.png] view at source ↗
Figure 10
Figure 10. Figure 10: The magnitude and phase of the klystron forward in 100 [PITH_FULL_IMAGE:figures/full_fig_p006_10.png] view at source ↗
read the original abstract

The Cool Copper Collider (C3) is a linear accelerator (LINAC) concept based on compact, high gradient, and normal conducting accelerator technology to support Higgs boson studies at 250 GeV and 550 GeV center of mass. The C3 accelerator is ten kilometers in scale and consist of 2,200 RF stations for 550 GeV center of mass. To maintain the stringent beam quality required by the collider across the LINACs, each of the cavities has a dedicated low-level RF (LLRF) system to stabilize the phase and amplitude of the field in the cavities from pulse to pulse and to compensate the fluctuation of the RF field within each pulse introduced by the beam loading process. To meet the design goals of being compact and affordable for future accelerators, we have designed the next generation LLRF (NG-LLRF) with a higher integration level based on radio frequency system-on-chip (RFSoC) technology. The NG-LLRF system samples RF signals directly and performs RF mixing digitally. The NG-LLRF has been characterized in loopback mode to evaluate the performance of the system and has also been tested with a standing-wave accelerating structure, a prototype structure for the C3 with peak RF power level up to 16.45 MW. This paper will focus on introducing the LLRF system design and timing system for C3 and the current NG-LLRF design. The high-power test results at different stages of the test setup with several pulse modulation schemes, including square pulse, pulse with phase reversals, and pulse trains, will be summarized, analyzed, and discussed.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 0 minor

Summary. The paper presents the design of a next-generation low-level RF (NG-LLRF) system for the Cool Copper Collider (C3), a 10 km normal-conducting LINAC with 2,200 RF stations. The NG-LLRF employs RFSoC technology for direct RF sampling and digital mixing to achieve compact, affordable stabilization of cavity fields against pulse-to-pulse variations and intra-pulse beam loading. It also describes an associated timing system. Characterization results are reported from loopback tests and high-power tests on a single standing-wave prototype structure at peak powers up to 16.45 MW, using square pulses, phase-reversal pulses, and pulse trains.

Significance. A compact, integrated LLRF architecture validated at prototype power levels would be a meaningful engineering contribution toward cost-effective, high-gradient normal-conducting accelerators. The direct-sampling RFSoC approach and the reported high-power prototype tests constitute concrete progress on hardware integration.

major comments (2)
  1. [Abstract and test setup description] Abstract and test-setup paragraphs: the central claim that the NG-LLRF meets C3 requirements rests on scaling from single-station prototype data to 2,200 synchronized stations over 10 km under beam loading, yet no measurements or analysis of distributed timing synchronization, cumulative jitter on km-scale links, or multi-station coordination are provided.
  2. [Design goals and performance claims] Design goals and performance claims: the manuscript states stringent phase/amplitude stability targets but supplies no quantitative error budgets, measured stability values with uncertainties, or direct comparison of loopback/prototype results against those targets, leaving the performance validation only partially supported.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for their thoughtful review and constructive comments on our manuscript. We address each major comment below and propose revisions where appropriate to strengthen the paper.

read point-by-point responses

  1. Referee: [Abstract and test setup description] Abstract and test-setup paragraphs: the central claim that the NG-LLRF meets C3 requirements rests on scaling from single-station prototype data to 2,200 synchronized stations over 10 km under beam loading, yet no measurements or analysis of distributed timing synchronization, cumulative jitter on km-scale links, or multi-station coordination are provided.

    Authors: We agree that the current manuscript presents results from a single-station prototype and does not include experimental data on distributed synchronization over km-scale links or multi-station coordination. The paper's scope is the design of the NG-LLRF system and its validation at the prototype level, with the timing system architecture described conceptually for the full C3. Full-scale distributed testing is beyond the scope of this initial report and will be addressed in future work. To address this, we will revise the abstract and relevant sections to more clearly delineate the prototype validation from the full-system requirements, avoiding any implication of complete system demonstration. revision: yes

  2. Referee: [Design goals and performance claims] Design goals and performance claims: the manuscript states stringent phase/amplitude stability targets but supplies no quantitative error budgets, measured stability values with uncertainties, or direct comparison of loopback/prototype results against those targets, leaving the performance validation only partially supported.

    Authors: The referee is correct that explicit quantitative error budgets and direct comparisons with uncertainties are not included. The manuscript reports characterization results from loopback and high-power tests, but does not tabulate measured stabilities against the C3 targets with error analysis. We will add a dedicated subsection or table in the results section providing the measured phase and amplitude stabilities from the tests, along with uncertainties where applicable, and compare them directly to the design targets. This will strengthen the performance validation. revision: yes

Circularity Check

0 steps flagged

No circularity: design description followed by direct experimental characterization

full rationale

The paper presents an engineering design for the NG-LLRF system based on RFSoC technology, followed by loopback characterization and high-power tests on a single prototype structure. No derivation chain, first-principles predictions, or fitted parameters are claimed; the reported results are direct measurements at up to 16.45 MW. No self-citations are load-bearing for any result, and the text contains no equations or steps that reduce to their own inputs by construction. The scaling concern raised in the skeptic note is a question of experimental coverage, not circular reasoning.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

The paper is an engineering design and test report; no mathematical derivations, fitted parameters, or new physical entities are introduced in the abstract.

axioms (1)
  • domain assumption Direct digital sampling and mixing via RFSoC can meet the phase and amplitude stability requirements for C3 cavities under beam loading
    This assumption underpins the choice of higher integration for compactness and affordability.

pith-pipeline@v0.9.1-grok · 5831 in / 1243 out tokens · 33484 ms · 2026-06-27T22:26:15.497787+00:00 · methodology

discussion (0)

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Reference graph

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18 extracted references · 8 canonical work pages · 1 internal anchor

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