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arxiv: 0710.4683 · v1 · submitted 2007-10-25 · 💻 cs.PL

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The Challenges of Hardware Synthesis from C-Like Languages

Stephen A. Edwards
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classification 💻 cs.PL
keywords c-likechallengeshardwarelanguagesbeenconcurrencycontroldesign
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MANY TECHNIQUES for synthesizing digital hardware from C-like languages have been proposed, but none have emerged as successful as Verilog or VHDL for register-transfer-level design. This paper looks at two of the fundamental challenges: concurrency and timing control.

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