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Paper Citation Record · LEDGER

TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

As of 10 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 14 inbound Pith citation observations for arXiv:2304.01433.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2304.01433 v3

Coverage vector

measured 0 of 0 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links

measured 14 of 14 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-10T06:31:04.303077+00:00

measured 14 of 14 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-08T14:14:35.272822Z

measured 1 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-08-05T02:28:24.338817Z

Reference resolution

0 of 0 outbound references displayed

  • verified exact0
  • verified fuzzy0
  • unresolved0
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch0

External citation measurements

19
arxiv_reference, observed 2026-08-05T02:28:24.338817Z

Outbound references

No outbound reference observations are available for this paper version.

Pith citing papers

Observation c53e8b4c-ee26-4ff3-a35a-0b13bba3ebe3 · inbound

Simple synthetic data reduces sycophancy in large language models cites this paper.

Simple synthetic data reduces sycophancy in large language models TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 16

Resolution
verified exact
arxiv_id, observed 2026-05-16T14:48:08.586330Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

source=arxiv_source observed=2026-05-16T14:48:08.508109Z digest=sha256:1eb3c1836b2786ef9119bb2a09eb69d14a3208017bb7a4d7cce07dc79e13efa8

Observation a383b0ba-cb36-47ff-a4f3-5a3c501ef85f · inbound

Machine Learning Fleet Efficiency: Analyzing and Optimizing Large-Scale Google TPU Systems with ML Productivity Goodput cites this paper.

Machine Learning Fleet Efficiency: Analyzing and Optimizing Large-Scale Google TPU Systems with ML Productivity Goodput TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 28

Resolution
unresolved
no resolver link, observed 2026-08-08T14:14:35.272822Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-08T14:14:35.272822Z digest=sha256:b438b40f2bcc5f2c63df1a3e0312c5f2f6d76270f2f30fc4dc32aa19f2bb0602

Observation 233239b0-c324-4270-a095-67d6cd36adee · inbound

KernelBench: Can LLMs Write Efficient GPU Kernels? cites this paper.

KernelBench: Can LLMs Write Efficient GPU Kernels? TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 14

Resolution
verified exact
arxiv_id, observed 2026-05-15T16:55:02.050250Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

source=pdf_text observed=2026-05-15T16:55:01.976356Z digest=sha256:ccd13b58e2c5b66ec4a70769f22fcdd12c7b5408eb1d04d5ba11614d777ac900

Observation e650dc4b-5ccd-450d-b1e4-5dd5ffbcb918 · inbound

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations cites this paper.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 28

Resolution
unresolved
no resolver link, observed 2026-08-06T22:04:35.821507Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T22:04:35.821507Z digest=sha256:edf2b5975535fe5765a6106d3f6c3787bec9e3e76ea141e2e052fbf2ea32e190

Observation 939fca8f-dfa5-4624-abb4-4cceb77a0d69 · inbound

A Survey on Efficiency Optimization Techniques for DNN-based Video Analytics: Process Systems, Algorithms, and Applications cites this paper.

A Survey on Efficiency Optimization Techniques for DNN-based Video Analytics: Process Systems, Algorithms, and Applications TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 139

Resolution
unresolved
no resolver link, observed 2026-08-06T15:30:19.998603Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T15:30:19.998603Z digest=sha256:bb10ef3bd684479d1134cd998b7e2d8b5c477d810452aac0eb13d408d2f9809e

Observation 8fee8b54-0805-46a9-9005-d92ed78fc734 · inbound

Toward Lifelong-Sustainable Electronic-Photonic AI Systems via Extreme Efficiency, Reconfigurability, and Robustness cites this paper.

Toward Lifelong-Sustainable Electronic-Photonic AI Systems via Extreme Efficiency, Reconfigurability, and Robustness TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 16

Resolution
unresolved
no resolver link, observed 2026-08-04T22:22:06.777578Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-04T22:22:06.777578Z digest=sha256:c923a05ffcffc809a66aa23c1bc2deaa2655d1122d01486129cbf7adeaf4530f

Observation 70b5ce84-1ed2-4cbe-848d-d755e6ed40cf · inbound

SindBERT, the Sailor: Charting the Seas of Turkish NLP cites this paper.

SindBERT, the Sailor: Charting the Seas of Turkish NLP TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 16

Resolution
unresolved
no resolver link, observed 2026-08-04T08:22:13.822491Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=arxiv_source observed=2026-08-04T08:22:13.822491Z digest=sha256:f762ee790087be44f301788fd420c0c8b8c203adbed4c21bcfa3ad220caa307e

Observation 61bc710d-ccf1-466e-990c-ce34151969b5 · inbound

HalleluBERT: Let Every Token That Has Meaning Bear Its Weight cites this paper.

HalleluBERT: Let Every Token That Has Meaning Bear Its Weight TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 11

Resolution
unresolved
no resolver link, observed 2026-08-04T08:21:42.767563Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=arxiv_source observed=2026-08-04T08:21:42.767563Z digest=sha256:8d1e544084e23efeafbdc80ef645c8ec403a921cc37de7b40e24ca7b0a2256ad

Observation 372eead8-4bb8-4b78-9ea8-f9ea692621ce · inbound

A Switch-Centric In-Network Architecture for Accelerating LLM Inference in Shared-Memory Network cites this paper.

A Switch-Centric In-Network Architecture for Accelerating LLM Inference in Shared-Memory Network TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 33

Resolution
verified exact
arxiv_id, observed 2026-05-14T01:58:36.943474Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

source=pdf_text observed=2026-05-14T01:54:00.951348Z digest=sha256:a1c352a3faff86f769e0beb2661f9cdd036acf90ec72face0d8b515842d2fd06

Observation fed2d7af-fe88-47d0-90d5-ecca2046fc86 · inbound

Latent Instruction Representation Alignment: defending against jailbreaks, backdoors and undesired knowledge in LLMs cites this paper.

Latent Instruction Representation Alignment: defending against jailbreaks, backdoors and undesired knowledge in LLMs TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 22

Resolution
verified exact
arxiv_id, observed 2026-05-11T08:21:00.048821Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

source=arxiv_source observed=2026-05-10T16:41:52.440793Z digest=sha256:8fd887caa4e089405a6d496c30103f14c2b858c61890784d08e9dc81c15c3d0a

Observation a784dd5e-578c-439e-b7d6-0250a8c7ee18 · inbound

Enabling AI ASICs for Zero Knowledge Proof cites this paper.

Enabling AI ASICs for Zero Knowledge Proof TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 22

Resolution
verified exact
arxiv_id, observed 2026-05-11T11:56:31.862935Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

source=pdf_text observed=2026-05-10T04:23:40.022306Z digest=sha256:b720ba5759145543ea20d708bcb2955d55f41c3f521ff134d849cfbec483cb96

Observation 5c239ef0-fd85-4704-bb96-0e506fa8bc19 · inbound

Mass Matrix Assembly on Tensor Cores for Implicit Particle-In-Cell Methods cites this paper.

Mass Matrix Assembly on Tensor Cores for Implicit Particle-In-Cell Methods TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 4

Resolution
verified exact
arxiv_id, observed 2026-05-10T01:51:00.282493Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

source=pdf_text observed=2026-05-10T01:48:28.819072Z digest=sha256:61e89f4e8f978e30fc9f8926bf8d2b53f08a066b2eab5bb07188b21f20b667b6

Observation 4deb1d31-be1e-4db7-9f84-b28be29f7590 · inbound

PortBERT: Navigating the Depths of Portuguese Language Models cites this paper.

PortBERT: Navigating the Depths of Portuguese Language Models TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 87

Resolution
verified exact
arxiv_id, observed 2026-06-28T14:52:18.768211Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

source=arxiv_source observed=2026-06-28T14:43:28.401687Z digest=sha256:0374f6a1cc680410cdae2d8ebcf271f80066e873b475686911936679224654b0

Observation a7b4dcea-b357-44ab-b5ff-abdad9fe2070 · inbound

AoiZora: Topology-Aware Auto-Parallel Optimization for Inference of Diffusion Transformers cites this paper.

AoiZora: Topology-Aware Auto-Parallel Optimization for Inference of Diffusion Transformers TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 17

Resolution
verified exact
arxiv_id, observed 2026-07-03T22:59:03.360219Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

source=pdf_text observed=2026-06-26T23:07:13.368633Z digest=sha256:2775c93d42fb05a6a455a1001203224e1b567c5d3b0f526c137d721431cff345