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Symmetry-Based Quantum Circuit Mapping

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arxiv 2310.18026 v1 pith:GISVBNEX submitted 2023-10-27 quant-ph cs.PLmath.CO

classification quant-phcs.PLmath.CO
keywords quantumcircuitmappingalgorithmprocessorsremappingsymmetry-basedcompilation
verification ladder T0 review T1 audit T2 compute T3 formal

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Quantum circuit mapping is a crucial process in the quantum circuit compilation pipeline, facilitating the transformation of a logical quantum circuit into a list of instructions directly executable on a target quantum system. Recent research has introduced a post-compilation step known as remapping, which seeks to reconfigure the initial circuit mapping to mitigate quantum circuit errors arising from system variability. As quantum processors continue to scale in size, the efficiency of quantum circuit mapping and the overall compilation process has become of paramount importance. In this work, we introduce a quantum circuit remapping algorithm that leverages the intrinsic symmetries in quantum processors, making it well-suited for large-scale quantum systems. This algorithm identifies all topologically equivalent circuit mappings by constraining the search space using symmetries and accelerates the scoring of each mapping using vector computation. Notably, this symmetry-based circuit remapping algorithm exhibits linear scaling with the number of qubits in the target quantum hardware and is proven to be optimal in terms of its time complexity. Moreover, we conduct a comparative analysis against existing methods in the literature, demonstrating the superior performance of our symmetry-based method on state-of-the-art quantum hardware architectures and highlighting the practical utility of our algorithm, particularly for quantum processors with millions of qubits.

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Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. S-SYNC: Shuttle and Swap Co-Optimization in Quantum Charge-Coupled Devices

    quant-ph 2025-05 conditional novelty 6.0 of 10

    S-SYNC unifies shuttling and SWAP operations into a single 'generic swap' on a static graph, and a greedy heuristic co-optimizes them to cut shuttling by 3.69x and raise success rate by 1.73x on average in simulation.

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