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FP6-LLM: Efficiently Serving Large Language Models Through FP6-Centric Algorithm-System Co-Design

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arxiv 2401.14112 v2 pith:INHEMWER submitted 2024-01-25 cs.LG cs.AIcs.AR

classification cs.LGcs.AIcs.AR
keywords inferencequantizationsupportfp6-llmmodelbit-widthcoreexisting
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Six-bit quantization (FP6) can effectively reduce the size of large language models (LLMs) and preserve the model quality consistently across varied applications. However, existing systems do not provide Tensor Core support for FP6 quantization and struggle to achieve practical performance improvements during LLM inference. It is challenging to support FP6 quantization on GPUs due to (1) unfriendly memory access of model weights with irregular bit-width and (2) high runtime overhead of weight de-quantization. To address these problems, we propose TC-FPx, the first full-stack GPU kernel design scheme with unified Tensor Core support of float-point weights for various quantization bit-width. We integrate TC-FPx kernel into an existing inference system, providing new end-to-end support (called FP6-LLM) for quantized LLM inference, where better trade-offs between inference cost and model quality are achieved. Experiments show that FP6-LLM enables the inference of LLaMA-70b using only a single GPU, achieving 1.69x-2.65x higher normalized inference throughput than the FP16 baseline. The source code is publicly available at https://github.com/usyd-fsalab/fp6_llm.

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Cited by 1 Pith paper

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  1. HACK: Homomorphic Acceleration via Compression of the Key-Value Cache for Disaggregated LLM Inference

    cs.DC 2025-02 conditional novelty 5.0 of 10

    HACK performs attention matrix multiplications directly on 2-bit quantized key-value cache entries, eliminating per-iteration dequantization and cutting end-to-end latency in disaggregated LLM serving.

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