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An Efficient Inference Framework for Early-exit Large Language Models

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arxiv 2407.20272 v1 pith:TJ7IDWKT submitted 2024-07-25 cs.CL cs.AIcs.LG

classification cs.CLcs.AIcs.LG
keywords inferenceearly-exitmodelsframeworkefficientlayersbatchbuilding
verification ladder T0 review T1 audit T2 compute T3 formal
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Building efficient inference framework has gained increasing interests for research community. Early-exit models, a variant of LLMs, improves the inference efficiency of LLMs by skipping rest layers and directly generate output tokens when they are confident enough. However, there is no work of LLM inference framework that takes early-exit models into consideration. This is non-trivial as prior art on LLM inference cannot be directly applied to early-exit models. In this work, we solves two key challenges in building efficient inference framework for early-exit models: (1) batch inference at iteration-level granularity; and (2) KV cache management. For the former, we propose to process the batch until all sequences surpass the early-exit confidence threshold. For the latter, we propose to fill the KV cache of rest layers before the iteration terminates. Our evaluation shows that, compared with the original vLLM operating at full layers, our solution achieves up to 1.25x speed up.

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Cited by 2 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Doomed from the Start: Early Abort of LLM Agent Episodes via a Recall-Controlled Probe Cascade

    cs.AI 2026-07 conditional novelty 7.0 of 10

    Hidden-state probes can flag doomed LLM-agent episodes from the first round, and a recall-calibrated cascade of abort gates cuts generated tokens by up to 60% while preserving a chosen success-recall target.

  2. River-LLM: Large Language Model Seamless Exit Based on KV Share

    cs.CL 2026-04 unverdicted novelty 6.0 of 10

    River-LLM enables token-level early exit in decoder-only LLMs by routing exited tokens through 4-bit quantized copies of backbone layers that share the KV cache addressing scheme, achieving 1.53–2.16× wall-clock speed...

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