Pith. sign in

REVIEW 4 major objections 5 minor 1 cited by

Realization of inverse-design magnonic logic gates

T0 review · 4 major / 5 minor · reviewed 2026-08-12 · deepseek-v4-flash

Challenge this review Re-run · record.json Download PDF Read on arXiv ↗ Review JSON

Pith's one-line read A single reconfigurable magnonic device is inverse-designed to implement NOT, OR, NOR, AND, NAND, and a half-adder at 5.04 GHz using spin-wave amplitude to encode bits.

desk verdict First experimental inverse-design magnonic logic gates on a reconfigurable platform, but the half-adder sits ~0.1 dB from its own threshold and single measurements make the central claim thinner than the abstract suggests. read the letter →

arxiv 2411.17546 v1 pith:J5VY6VA5 submitted 2024-11-26 cond-mat.other

Noura Zenbaa , Fabian Majcen , Claas Abert , Florian Bruckner , Norbert J. Mauser , Thomas Schrefl , Qi Wang , Dieter Suess
show 1 more author
Andrii V. Chumak
This is my paper · ORCID
classification cond-mat.other
keywords magnoniclogicgatesinversedesignspinwavesYIGfilmreconfigurabledeviceBooleancomputinghalf-addercurrentloops
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper reports the first experimental realization of inverse-designed magnonic logic gates. A single reconfigurable device, a 7x7 array of current loops on a yttrium-iron-garnet film, is optimized by a feedback algorithm to produce the Boolean functions NOT, OR, NOR, AND, NAND, and a half-adder. Bits are encoded in the amplitude of a 5.04 GHz spin wave, with '1' above 90% and '0' below 10% of the maximum transmission. If the demonstration holds, it shows that a single physical platform can be reprogrammed to perform a functionally complete set of logic operations without resorting to electronic components or new fabrication.

What carries the argument

The key machinery is the 7x7 array of omega-shaped current loops, each producing a local Oersted field of up to ±3.46 mT that shifts the spin-wave dispersion and thereby alters interference in the spin-wave transmission. The Direct Search algorithm walks through the 49 loops one by one, accepting or rejecting random current changes to drive a gate-specific objective function toward 100%. The objective functions combine transmission percentages defined by a 90/10 threshold rule, and for the half-adder they simultaneously constrain two output transducers (sum and carry).

What would settle it

Measure the transmission of every logic state repeatedly over time for the optimized current configurations, or rerun the Direct Search optimization from multiple random starting points and check whether each attempt satisfies the 90/10 threshold condition; if variability erases the smaller contrast margins (about 10 dB for the half-adder and NOR), the claimed gate reliability does not hold.

Watch

Extended reading notes

Core claim

The central discovery is that an inverse-design procedure, which iteratively adjusts 49 independent loop currents to maximize an objective function, can land on current configurations whose spin-wave interference implements six distinct logic functions on the same YIG-based device. The authors report contrast ratios of 34, 53.9, 11.8, 19.7, 17, and 9.8 dB for NOT, OR, NOR, AND, NAND, and the half-adder, respectively, all measured at 5.04 GHz with 25 dBm input power in the nonlinear spin-wave regime. The NOT, NOR, and NAND gates use a continuously open feed-line to supply a reference signal so that the '0' input state still yields a detectable output.

Load-bearing premise

The load-bearing premise is that the single run of the Direct Search optimizer yields a current configuration with reproducible logic behavior; with only one transmission value per input state and no error bars, any run-to-run or time-dependent variation comparable to the smallest contrast margins (about 9.8 dB) would break the claimed functionality.

Editorial extensions

If this is right

  • A single inverse-designed device can be reprogrammed to serve as different logic gates, so a magnonic processor need not be fabricated per function.
  • The demonstrated gate set is functionally complete (NOR and NAND are universal), meaning arbitrary Boolean circuits could in principle be built by cascading these gates.
  • The half-adder shows that multi-output operations can be encoded in one optimization, reducing the gate count compared with assembling XOR and AND separately.
  • Operation in the nonlinear spin-wave regime at 25 dBm indicates that the same interference mechanism can support amplitude-based logic rather than phase-based logic.
  • Because all gates run at the same 5.04 GHz frequency, the device is compatible with frequency-multiplexed signal processing.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The single-run optimization with no repeated measurements leaves open whether the reported current configurations are robust; a natural extension is to test reproducibility across restarts and over time.
  • The 90/10 amplitude threshold implies that cascading gates would require careful gain or regeneration, since the output amplitudes vary across gates; the authors do not address fan-out.
  • The same inverse-design scheme could in principle be used to search for XOR, full adder, or majority gates directly, since the objective-function framework is not specific to the demonstrated functions.
  • The contrast ratios differ by more than a factor of five across gates, suggesting that some functions (half-adder, NOR) are operating closer to the margin and may be the first to fail under perturbations.
Share X Bluesky LinkedIn Reddit HN

Signed reviews

No signed human review yet.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

4 major / 5 minor

Summary. The paper reports the experimental realization of six logic functions—NOT, OR, NOR, AND, NAND, and a half-adder—on a single reconfigurable inverse-designed magnonic device. The device consists of a 7×7 array of current loops on a YIG film that generate local Oersted fields and scatter spin waves; logic states are encoded in spin-wave transmission amplitude at 5.04 GHz and 25 dBm, with outputs above 90% and below 10% of the maximum transmission treated as logic 1 and 0, respectively. A Direct Search optimizer adjusts the 49 loop currents to maximize objective functions built from these transmission thresholds. The reported contrast ratios between logic states are 34, 53.9, 11.8, 19.7, 17, and 9.8 dB for NOT, OR, NOR, AND, NAND, and the half-adder.

Significance. If the results are reproducible, the paper makes a meaningful experimental advance: it extends inverse design of magnonic devices from linear RF components to nonlinear Boolean logic, and demonstrates that one programmable platform can implement a functionally complete set of gates and a half-adder. The work builds directly on the authors' prior device (ref. 33), and the new contribution is the nonlinear logic functionality and the half-adder demonstration. The reported transmission values mostly satisfy the stated 90/10 criterion, and the paper is candid about the optimization procedure and objective functions. However, the experimental support is incomplete in ways that bear directly on the central claim: single measurements without error bars, a missing AND-state value, an unmeasured OR "00" baseline, and a half-adder carry-output margin of only 0.11 dB from the logic threshold.

major comments (4)
  1. [§II.E, Fig. 5(a)] The half-adder carry output C at input state "01" is reported as 9.73% transmission, corresponding to -60.84 dB, while the logic-0 threshold is 10% of the maximum (-60.73 dB, since the 100% reference is -50.73 dB). The margin is therefore only 0.11 dB. Only one VNA transmission value per state is reported, with no error bars or repeated measurements. A standard VNA noise and drift excursion at -60 dB can easily exceed 0.1 dB, so a single repeated measurement could flip this bit. This margin, not the 9.8 dB contrast ratio, governs whether the half-adder truth table is actually satisfied. The authors should provide repeated measurements of this state, an estimate of measurement uncertainty, and ideally repeated optimization runs, to support the claim that the half-adder is realized.
  2. [§II.D and Eq. (5)] The AND-gate paragraph lists only three dB values for four input states: "The transmission percentages of input states "00", "01", "10" and "11" ... correspond to -60.99 dB, -64.007 dB and -41.33 dB, respectively." One state is missing, so the AND truth table cannot be verified from the reported data. In addition, Eq. (5), the AND objective, contains no T^{"00"} term; the "00" output is neither optimized nor reported. The authors must supply the missing value and ideally include the "00" state in the objective or explain why it is constrained otherwise.
  3. [§II.C] The OR-gate contrast ratio of 53.9 dB is computed using -100 dB as the transmission for input state "00", with the justification that this is "the smallest transmission reached in (33)". This baseline is taken from a prior paper rather than measured for the present device and current configuration. Since state "00" is also absent from the OR objective function in Eq. (3), the reported contrast ratio rests on an assumed rather than measured value. The authors should measure the actual leakage/noise floor in situ, or explicitly restate the contrast ratio as a lower bound with the measurement basis.
  4. [§II.B–E and §III.C] All logic results are based on single runs of the Direct Search optimizer and single transmission measurements per state, with no repeated measurements, error bars, or independent restarts. Given that the algorithm is stochastic and relies on mechanical switches, the paper does not yet establish run-to-run or time-dependent reproducibility. This is particularly important for the two marginal gates—the half-adder carry output and the NOR "11" state at 6.6%, which sits about 1.8 dB below the 10% threshold. Repeating the measurements of the final configurations and reporting the spread would directly address this concern.
minor comments (5)
  1. [§II.B, Eq. (2)] The formula for T^A is difficult to parse as printed: "T A = 10 SA 21−SA 21,max 10 × 100" should presumably be T^A = 10^((S^A_{21} − S^A_{21,max})/10) × 100, with a clear explanation of the dB reference. Please rewrite it in a single, unambiguous expression.
  2. [§III.A] The sample thickness is given as "18-¸ tm-thick"; this appears to be a character-encoding corruption for "18-µm-thick".
  3. [Fig. 2 caption] The caption for Fig. 2 lists panels "a" and "c", but the figure shows "a" and "b" in the main text; the panel labels should be harmonized.
  4. [§II.D] The sentence listing AND transmission percentages is grammatically incomplete because it names four states but provides three dB values; this is a data-completeness issue as well as a presentation issue.
  5. [§II.E] The phrase "outputs A and B" in the Fig. 3 and Fig. 4 captions should be "inputs A and B"; the outputs are labeled C and S.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the gates are inverse-design optimization targets reported as realizations, not independent predictions.

full rationale

The paper makes no predictive claim that could reduce to its inputs. Its logic gates are produced by a direct-search optimizer maximizing explicit objective functions (Eqs. 1 and 3-7) whose success criteria are the same 90/10 transmission thresholds later reported; the reported truth tables and contrast ratios are the optimized outputs, not independent predictions. That is inherent to inverse design and is not circular. The apparatus and optimizer are cited to prior work by the same group (Refs. 27 and 33), but these citations supply the physical platform and algorithm, not the logic functionality, so they are not load-bearing in the derivation. The only numerical import from a self-cited source is the -100 dB floor used to estimate the OR '00' state contrast (Sec. II.C); this is a conservative floor assumed for a state that is not measured, and the OR logic functionality itself does not depend on it. Concerns about single measurements and thin threshold margins (half-adder C at 9.73% vs 10% threshold, Sec. II.E) are experimental reproducibility risks, not circularity. No equation in the paper is equivalent by construction to a claimed derived result.

Assumptions & free parameters 5 free parameters · 4 assumptions · 0 invented entities

The central claim rests on the physical picture of current-loop Oersted fields modifying FVMSW propagation, the choice of a nonlinear operating point, the stability of the always-on feed-line, and the ability of a single random-start hill-climb to find a working current pattern. No new particles, forces, or dimensions are introduced. The free parameters are operating conditions and classification thresholds chosen by the authors rather than constants derived from theory.

free parameters (5)
  • Operating frequency 5.04 GHz = 5.04 GHz
    Chosen because zero-current spin-wave transmission is similar across input-output pairs (Fig. S1); all gates are demonstrated only at this single frequency point.
  • Input microwave power 25 dBm = 25 dBm
    Selected to place the device in the nonlinear spin-wave regime (reference 34); no justification beyond this is given, and gate behavior at other powers is not shown.
  • Logic thresholds 90%/10% of maximum transmission = 90% / 10%
    Hand-chosen classification thresholds; every gate's success is defined relative to these, so reported contrast ratios are relative and not absolute power levels.
  • Current range and step ±400 mA, 100 mA steps = ±400 mA, 9 levels
    Chosen to limit device heating; this constrains the optimization search space and is not derived from gate requirements.
  • Per-iteration normalization to maximum transmission = 100% equals the maximum among recorded states per iteration
    Equation 2 computes percentages relative to the largest transmission in that iteration, so the absolute signal level for logic 1 varies between gates and iterations.
assumptions (4)
  • domain assumption Oersted fields from current loops shift the local FVMSW dispersion, enabling controlled spin-wave interference.
    The entire inverse-design mechanism relies on this physical picture (Section II.A).
  • domain assumption At 25 dBm input power the spin waves are in a nonlinear regime and this nonlinearity is what enables the logic functions.
    The paper states the gates are nonlinear and were realized at 25 dBm, but no characterization of the nonlinearity or proof that linear superposition is insufficient is given (Section II.A, reference 34).
  • domain assumption The feed-line F provides a stable continuous reference so that NOT, NOR and NAND can output logic 1 when inputs are 0.
    The feed-line is always open (Sections II.B, II.C and II.D); the results assume its signal level is stable and its interference with the input signals is reproducible.
  • domain assumption The Direct Search algorithm can find a globally satisfactory current configuration from one random initial configuration.
    Section III.C describes a random-start hill-climbing search; no restarts, convergence criteria, or success-rate statistics are reported, yet each gate is presented as realized.

how reviews work

0 comments
Cite this review

Pith. "Pith review of Realization of inverse-design magnonic logic gates." pith.science (2026). https://pith.science/paper/J5VY6VA5

@misc{pith2026241117546,
  author       = {Pith},
  title        = {Pith review of: Realization of inverse-design magnonic logic gates},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/J5VY6VA5}},
  note         = {Machine review of arXiv:2411.17546}
}
abstract

Magnonic logic gates represent a crucial step toward realizing fully magnonic data processing systems without reliance on conventional electronic or photonic elements. Recently, a universal and reconfigurable inverse-design device has been developed, featuring a 7$\times$7 array of independent current loops that create local inhomogeneous magnetic fields to scatter spin waves in a Yttrium-Iron-Garnet film. While initially used for linear RF components, we now demonstrate key non-linear logic gates, NOT, OR, NOR, AND, NAND, and a half-adder, sufficient for building a full processor. In this system, binary data ("0" and "1") are encoded in the spin-wave amplitude. The contrast ratio, representing the difference between logic states, achieved values of 34, 53.9, 11.8, 19.7, 17, and 9.8 dB for these gates, respectively.

Figures

Figures reproduced from arXiv: 2411.17546 by the authors.

Figure 1
Figure 1. The experimental setup of the half-adder logic functionality. a The reconfigurable inverse-design device depicting the 7×7 omega-shaped loop array placed on top a YIG film. It depicts the effect of the current applied to the loops as a field landscape generated locally on the film in red (film top) and blue (film bottom) for both current polarities, parallel or antiparallel to the applied out-pf-plane magnetic field… view at source ↗
Figure 2
Figure 2. The NOT logic functionality. a The spin-wave transmission percentage of output A at both logic states of input A. c A 2D color map representing the Oersted field generated by the omega-shaped loops to achieve results shown in panel a. -64.007 dB and -41.33 dB, respectively. The contrast ratio achieved for the AND gates is −41.33−(−60.99) ≈ 19.7 dB. The AND logic gate was realised in 1118 iterations. The generated Oe… view at source ↗
Figure 3
Figure 3. OR and NOR logic functionalities. a (OR logic gate) The spin-wave transmission percentage of output C for all logic combinations of outputs A and B. b A 2D color map representing the Oersted field generated by the omega-shaped loops to achieve results shown in panel a. c (NOR logic gate) The spin-wave transmission percentage of output C for all logic combinations of outputs A and B. d A 2D color map representing the… view at source ↗
Figures from the paper (2 more)
Figure 4
Figure 4. Figure 4: AND and NAND logic functionalities. a (AND logic gate) The spin-wave transmission percentage of output C for all logic combinations of outputs A and B. b A 2D color map representing the Oersted field generated by the omega-shaped loops to achieve results shown in panel…
Figure 5
Figure 5. Figure 5: The half-adder logic functionality. a Schematic representation of half-adder gate. b The spin-wave transmission percentage of outputs S and C at all logic combinations of outputs A and B. c A 2D color map representing the Oersted field generated by the omega-shaped loo…

Discussion (0). Continue with ORCID to comment.

Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Elimination of substrate-induced FMR linewidth broadening in the epitaxial system YIG-GGG by microstructuring

    cond-mat.mes-hall 2025-02 conditional novelty 5.0 of 10

    Microstructuring YIG films so they sit only in the homogeneous region of the GGG substrate's stray field eliminates the asymmetric FMR linewidth broadening at cryogenic temperatures.

Reference graph

Works this paper leans on

38 extracted references · 33 canonical work pages · cited by 1 Pith paper

  1. [1]

    Barman, et al

    A. Barman, et al. , Journal of Physics: Condensed Matter 33, 413001 (2021)

    2021

  2. [2]

    Iwaba, K

    M. Iwaba, K. Sekiguchi, Applied Physics Express 14, 073002 (2021)

    work page 2021

  3. [3]

    A. V . Chumak, et al. , IEEE Transactions on Magnetics 58, 1 (2022)

    2022

  4. [4]

    Y. V . Khivintsev, et al., Journal of Magnetism and Magnetic Materials 545, 168754 (2022)

    work page 2022

  5. [5]

    Kampfrath, et al

    T . Kampfrath, et al. , Nature Photonics 5, 31 (2011)

    work page 2011

  6. [6]

    Wu, et al

    Y. Wu, et al. , Advanced Materials 29, 1603031 (2017)

    2017

  7. [7]

    Krivosik, C

    P . Krivosik, C. E. Patton, Physical Review B 82, 184428 (2010)

    work page 2010

  8. [8]

    A. V . Chumak, A. A. Serga, B. Hillebrands, Nature Communications 5, 4700 (2014)

    work page 2014

Show all 38 references
  1. [9]

    A. V . Sadovnikov, et al. , Applied Physics Letters 109, 042407 (2016)

    2016

  2. [10]

    Khitun, M

    A. Khitun, M. Bao, K. L. Wang, Journal of Physics D: Applied Physics 43, 264005 (2010)

    2010

  3. [11]

    Talmelli, et al

    G. Talmelli, et al. , Science Advances 6, eabb4042 (2020)

    2020

  4. [12]

    Adelmann, F

    C. Adelmann, F . Ciubotaru, F . Meng, S. Cotofana, S. Couet, 2023 IEEE International Magnetic Conference - Short Papers (INTERMAG Short Papers) (2023), pp. 1–2

    2023

  5. [13]

    Hayashi, S

    R. Hayashi, S. Nezu, K. Sekiguchi, Physical Review Applied 22, 034037 (2024)

    2024

  6. [14]

    M. P . Kostylev, A. A. Serga, T . Schneider, B. Leven, B. Hillebrands, Applied Physics Letters 87, 153501 (2005)

    2005

  7. [15]

    Schneider, et al

    T . Schneider, et al. , Applied Physics Letters 92, 022505 (2008)

    2008

  8. [16]

    A. B. Ustinov, E. LÃd’hderanta, M. Inoue, B. A. Kalinikos, IEEE Magnetics Letters 10, 1 (2019)

    2019

  9. [17]

    Wang, et al

    Q. Wang, et al. , Nature Electronics 3, 765 (2020)

    2020

  10. [18]

    Goto, et al

    T . Goto, et al. , Scientific Reports 9, 16472 (2019)

    2019

  11. [19]

    Schulz, et al

    F . Schulz, et al. , AIP Advances 13, 015115 (2023)

    2023

  12. [20]

    A. A. Nikitin, et al. , Applied Physics Letters 106, 102405 (2015)

    2015

  13. [21]

    Chen, et al

    P . Chen, et al. , Physical Review Applied 20, 054019 (2023)

    2023

  14. [22]

    Litvinenko, et al

    A. Litvinenko, et al. , Communications Physics 6, 1 (2023)

    2023

  15. [23]

    A. N. Mahmoud, et al., IEEE Nanotechnology Magazine 16, 47 (2022)

    2022

  16. [24]

    Balynsky, et al

    M. Balynsky, et al. , Journal of Applied Physics 133, 023904 (2023)

    2023

  17. [25]

    Mahmoud, et al

    A. Mahmoud, et al. , Journal of Applied Physics 128, 161101 (2020)

    2020

  18. [26]

    Garlando, Q

    U. Garlando, Q. Wang, O. V . Dobrovolskiy, A. V . Chumak, F . Riente, IEEE Transactions on Emerging Topics in Computing 11, 679 (2023)

    2023

  19. [27]

    Q. Wang, A. V . Chumak, P . Pirro, Nature Communications 12, 2636 (2021). 8

    2021

  20. [28]

    A. Papp, W . Porod, G. Csaba, Nature Communications 12 (2021)

    2021

  21. [29]

    Kiechle, et al

    M. Kiechle, et al. , IEEE Magnetics Letters 13, 1 (2022)

    2022

  22. [30]

    Neŧeli, Y

    B. Neŧeli, Y. A. Yilmaz, H. Kurt, M. Turduev, Journal of Physics D: Applied Physics 55, 215107 (2022)

    2022

  23. [31]

    Wang, et al

    H. Wang, et al. , Optics & Laser Technology 169, 110192 (2024)

    2024

  24. [32]

    Lan, et al

    Y. Lan, et al. , Optics Communications 569, 130800 (2024)

    2024

  25. [33]

    Zenbaa, et al

    N. Zenbaa, et al. , Experimental realisation of a universal inverse- design magnonic device (2024). ArXiv:2403.17724

    2024 arXiv

  26. [34]

    Wang, et al

    Q. Wang, et al. , Science Advances 9, eadg4609 (2023)

    2023

  27. [35]

    Khitun, Journal of Applied Physics 111, 054307 (2012)

    A. Khitun, Journal of Applied Physics 111, 054307 (2012)

    2012

  28. [36]

    Dubs, et al

    C. Dubs, et al. , Journal of Physics D: Applied Physics 50, 204005 (2017)

    2017

  29. [37]

    A. A. Serga, A. V . Chumak, B. Hillebrands, Journal of Physics D: Applied Physics 43, 264002 (2010)

    2010

  30. [38]

    B. Shen, P . Wang, R. Polson, R. Menon, Nature Photonics 9, 378 (2015). 9 Supplementary Information SPIN -WAVE FULL TRANSMISSION SPECTRUM AT 350 MT Figure S1a and S1b show the full signal of the spin-wave transmission at 350 mT . They show the reference signal (at zero applied...

    2015

Pith tools

Reviewed August 12, 2026 · model on record in the stance chip above.