A survey on FPGA-based accelerator for ML models | Paper Citation Record

Observation db3813c0-44ed-43a2-bc7b-7a9c0ebdf3d6 · outbound

This paper cites Lung ct image segmen- tation using deep neural networks,.

A survey on FPGA-based accelerator for ML models Lung ct image segmen- tation using deep neural networks,

Reference 1

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.347845Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 71907c4f-4feb-46e6-98a1-ff54af93f1e6 · outbound

This paper cites Imagenet classification with deep convolutional neural networks,.

A survey on FPGA-based accelerator for ML models Imagenet classification with deep convolutional neural networks,

Reference 2

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.350639Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1d0d910f-611f-4ae1-82b7-2408fab2ed14 · outbound

This paper cites Deep residual learning for image recognition,.

A survey on FPGA-based accelerator for ML models Deep residual learning for image recognition,

Reference 3

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.353622Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation af236a1e-e7ca-4916-95cd-61d6a886b59b · outbound

This paper cites YOLOv4: Optimal Speed and Accuracy of Object Detection.

A survey on FPGA-based accelerator for ML models YOLOv4: Optimal Speed and Accuracy of Object Detection

Reference 4

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.355686Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 99c346ef-4b5c-428a-9cec-de25ca4be406 · outbound

This paper cites A state of art techniques on machine learning algorithms: a perspective of supervised learning approaches in data classification,.

A survey on FPGA-based accelerator for ML models A state of art techniques on machine learning algorithms: a perspective of supervised learning approaches in data classification,

Reference 5

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.358245Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f5d358b0-1310-43a3-ba44-f5e4910b0d03 · outbound

This paper cites Machine learning and natural language processing in psychotherapy research: Alliance as example use case.

A survey on FPGA-based accelerator for ML models Machine learning and natural language processing in psychotherapy research: Alliance as example use case

Reference 6

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.360426Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a53d3011-f221-4559-ac48-d46edc0ae86c · outbound

This paper cites Resource- aware on-device deep learning for supermarket hazard detection,.

A survey on FPGA-based accelerator for ML models Resource- aware on-device deep learning for supermarket hazard detection,

Reference 7

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.363321Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 3e819b12-8c12-4483-a602-9d6ddd76f453 · outbound

This paper cites Sciann: A keras/tensorflow wrapper for scientific computations and physics-informed deep learning using artificial neural networks,.

A survey on FPGA-based accelerator for ML models Sciann: A keras/tensorflow wrapper for scientific computations and physics-informed deep learning using artificial neural networks,

Reference 8

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.365300Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 4569d6eb-a0e3-4266-9a91-9adcf999f390 · outbound

This paper cites Autockt: Deep reinforcement learning of analog circuit designs,.

A survey on FPGA-based accelerator for ML models Autockt: Deep reinforcement learning of analog circuit designs,

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.367183Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ffd38fc4-2043-4d03-a880-fd3f96122caf · outbound

This paper cites Learning both weights and connections for efficient neural network,.

A survey on FPGA-based accelerator for ML models Learning both weights and connections for efficient neural network,

Reference 10

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.369727Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation e34fcc0b-a007-4770-bed6-0b7e945748d6 · outbound

This paper cites A real-time object detection accelerator with compressed ss- dlite on fpga,.

A survey on FPGA-based accelerator for ML models A real-time object detection accelerator with compressed ss- dlite on fpga,

Reference 11

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.372266Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a38db559-f160-474a-a6f4-55b1fe2226f3 · outbound

This paper cites Accelerated real-time classification of evolving data streams using adaptive random forests,.

A survey on FPGA-based accelerator for ML models Accelerated real-time classification of evolving data streams using adaptive random forests,

Reference 12

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.374889Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2eb50692-51e2-4524-846e-f671c46dfe67 · outbound

This paper cites Towards an efficient accelerator for dnn-based remote sensing image segmentation on fpgas,.

A survey on FPGA-based accelerator for ML models Towards an efficient accelerator for dnn-based remote sensing image segmentation on fpgas,

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.377213Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 70e4b331-3499-4428-8ef6-2ea5dfc7d909 · outbound

This paper cites Req-yolo: A resource-aware, efficient quantization framework for object detection on fpgas,.

A survey on FPGA-based accelerator for ML models Req-yolo: A resource-aware, efficient quantization framework for object detection on fpgas,

Reference 14

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.379209Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a3a0808a-7cd6-4b0e-a198-497eb7abfdc0 · outbound

This paper cites A lightweight yolov2: A binarized cnn with a parallel support vector regression for an fpga,.

A survey on FPGA-based accelerator for ML models A lightweight yolov2: A binarized cnn with a parallel support vector regression for an fpga,

Reference 15

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.381761Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 10e7c540-c4a2-40c6-a7e1-514282b8f965 · outbound

This paper cites Zynet: automating deep neural network implementation on low-cost reconfigurable edge computing platforms,.

A survey on FPGA-based accelerator for ML models Zynet: automating deep neural network implementation on low-cost reconfigurable edge computing platforms,

Reference 16

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.384594Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation dbec09cc-aa07-4c7d-aa31-2174bd02a8c9 · outbound

This paper cites Squeezejet-3: an accelerator utilizing fpga mpsocs for edge cnn applications,.

A survey on FPGA-based accelerator for ML models Squeezejet-3: an accelerator utilizing fpga mpsocs for edge cnn applications,

Reference 17

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.386735Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 296ddb9d-7122-4c5b-9c0e-41c6506e97f5 · outbound

This paper cites Netpu: Prototyping a generic reconfigurable neural network accelerator architecture,.

A survey on FPGA-based accelerator for ML models Netpu: Prototyping a generic reconfigurable neural network accelerator architecture,

Reference 18

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.388688Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 39ee4750-a100-48a4-baff-ec624d525e84 · outbound

This paper cites N3h-core: Neuron-designed neural network accelerator via fpga- based heterogeneous computing cores,.

A survey on FPGA-based accelerator for ML models N3h-core: Neuron-designed neural network accelerator via fpga- based heterogeneous computing cores,

Reference 19

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.391732Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a7858039-4370-49d7-8c07-736f37ad489e · outbound

This paper cites Mafia: Machine learning acceleration on fpgas for iot applications,.

A survey on FPGA-based accelerator for ML models Mafia: Machine learning acceleration on fpgas for iot applications,

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.394676Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 869c9abc-e7ac-48bf-b31d-be4144f01569 · outbound

This paper cites Design of high- throughput mixed-precision cnn accelerators on fpga,.

A survey on FPGA-based accelerator for ML models Design of high- throughput mixed-precision cnn accelerators on fpga,

Reference 21

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.396807Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7a34f221-cc54-473a-af6b-5dc1c5284aef · outbound

This paper cites Exploration of low numeric precision deep learning infer- ence using intel® fpgas,.

A survey on FPGA-based accelerator for ML models Exploration of low numeric precision deep learning infer- ence using intel® fpgas,

Reference 22

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.398855Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 65a813c1-6515-43e9-983e-7495755a1a8d · outbound

This paper cites A high-performance cnn processor based on fpga for mobilenets,.

A survey on FPGA-based accelerator for ML models A high-performance cnn processor based on fpga for mobilenets,

Reference 23

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.401191Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 4fd76d8e-f506-4fba-9942-f8a4cddfb4ff · outbound

This paper cites A reconfigurable multithreaded accelerator for recurrent neural networks,.

A survey on FPGA-based accelerator for ML models A reconfigurable multithreaded accelerator for recurrent neural networks,

Reference 24

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.403754Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 63d89b12-20fe-4c35-8b61-8a52f1544976 · outbound

This paper cites Accelerating bayesian inference on structured graphs using parallel gibbs sampling,.

A survey on FPGA-based accelerator for ML models Accelerating bayesian inference on structured graphs using parallel gibbs sampling,

Reference 25

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.406027Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 3ef4e796-62be-4559-8a9d-13b4c0a4d1ae · outbound

This paper cites An fpga-based low-latency acceler- ator for randomly wired neural networks,.

A survey on FPGA-based accelerator for ML models An fpga-based low-latency acceler- ator for randomly wired neural networks,

Reference 26

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.408267Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ab0767c2-a09d-462c-9339-594eecbbe268 · outbound

This paper cites An fpga-based upper- limb rehabilitation device for gesture recognition and motion evaluation using multi-task recurrent neural networks,.

A survey on FPGA-based accelerator for ML models An fpga-based upper- limb rehabilitation device for gesture recognition and motion evaluation using multi-task recurrent neural networks,

Reference 27

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.410698Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f45104ff-f907-4a01-b6a0-a172ebcfc6ef · outbound

This paper cites Effi- cient stride 2 winograd convolution method using unified transforma- tion matrices on fpga,.

A survey on FPGA-based accelerator for ML models Effi- cient stride 2 winograd convolution method using unified transforma- tion matrices on fpga,

Reference 28

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.412888Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1841570c-fa3f-4be0-85ca-58c27fcd1905 · outbound

This paper cites Esca: Event- based split-cnn architecture with data-level parallelism on ultrascale+ fpga,.

A survey on FPGA-based accelerator for ML models Esca: Event- based split-cnn architecture with data-level parallelism on ultrascale+ fpga,

Reference 29

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.415148Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 545c8c6c-53a2-4a95-9a92-42c6985d9dfc · outbound

This paper cites Explor- ing resource-efficient acceleration algorithm for transposed convolu- tion of gans on fpga,.

A survey on FPGA-based accelerator for ML models Explor- ing resource-efficient acceleration algorithm for transposed convolu- tion of gans on fpga,

Reference 30

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.417323Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c430fb71-a4c5-44e9-9f89-bbb706ecce4c · outbound

This paper cites Leveraging fine-grained structured sparsity for cnn inference on systolic array architectures,.

A survey on FPGA-based accelerator for ML models Leveraging fine-grained structured sparsity for cnn inference on systolic array architectures,

Reference 31

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.419354Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a123290d-a806-4eff-8e09-696e65a19f5b · outbound

This paper cites Optimizing reconfigurable recurrent neural networks,.

A survey on FPGA-based accelerator for ML models Optimizing reconfigurable recurrent neural networks,

Reference 32

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.421985Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7e99eef3-468b-401f-8079-0af4c7939e9f · outbound

This paper cites Rna: Reconfigurable lstm accel- erator with near data approximate processing,.

A survey on FPGA-based accelerator for ML models Rna: Reconfigurable lstm accel- erator with near data approximate processing,

Reference 33

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.424580Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 52e4197e-57fb-4a17-82e9-da1823b2e530 · outbound

This paper cites When massive GPU parallelism ain’t enough: A novel hardware architectureof 2d-lstm neural network,.

A survey on FPGA-based accelerator for ML models When massive GPU parallelism ain’t enough: A novel hardware architectureof 2d-lstm neural network,

Reference 34

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.426327Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a82c4cec-cfdd-4f95-86bb-b11a2978e5c0 · outbound

This paper cites Bramac: Compute-in-bram architec- tures for multiply-accumulate on fpgas,.

A survey on FPGA-based accelerator for ML models Bramac: Compute-in-bram architec- tures for multiply-accumulate on fpgas,

Reference 35

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.428258Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 243be754-be27-41fe-95da-2a7cb9769bdc · outbound

This paper cites A system-level transprecision fpga accelerator for blstm using on-chip memory reshaping,.

A survey on FPGA-based accelerator for ML models A system-level transprecision fpga accelerator for blstm using on-chip memory reshaping,

Reference 36

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.430025Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c9ca3f93-d299-4b17-a377-25bdbfb5f86d · outbound

This paper cites Evaluating low-memory gemms for convolutional neural network inference on fpgas,.

A survey on FPGA-based accelerator for ML models Evaluating low-memory gemms for convolutional neural network inference on fpgas,

Reference 37

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.432059Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1d72c18f-d6d8-4baf-bb4b-fe73d9a9bd27 · outbound

This paper cites All adder neural networks for on-board remote sensing scene classification,.

A survey on FPGA-based accelerator for ML models All adder neural networks for on-board remote sensing scene classification,

Reference 38

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.434843Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation cee14a68-960d-49d6-aa7a-e16c73abc673 · outbound

This paper cites An opencl-based fpga accelerator for compressed yolov2,.

A survey on FPGA-based accelerator for ML models An opencl-based fpga accelerator for compressed yolov2,

Reference 39

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.437089Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation bee48d03-b089-49f2-b4a1-429035fcf155 · outbound

This paper cites Boostgcn: A framework for optimizing gcn inference on fpga,.

A survey on FPGA-based accelerator for ML models Boostgcn: A framework for optimizing gcn inference on fpga,

Reference 40

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.438856Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2300a57c-c1f7-4306-bd0f-6822c588c9dd · outbound

This paper cites C- lstm: Enabling efficient lstm using structured compression techniques on fpgas,.

A survey on FPGA-based accelerator for ML models C- lstm: Enabling efficient lstm using structured compression techniques on fpgas,

Reference 41

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.440509Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7055e401-b1d3-4ee8-b24d-c8b6fd8daf03 · outbound

This paper cites Efficient and effective sparse lstm on fpga with bank-balanced sparsity,.

A survey on FPGA-based accelerator for ML models Efficient and effective sparse lstm on fpga with bank-balanced sparsity,

Reference 42

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.442368Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation e6855b04-93bb-4c93-93e7-c6c03dbbdf08 · outbound

This paper cites Fixyfpga: Efficient fpga accelerator for deep neural networks with high element-wise sparsity and without external memory access,.

A survey on FPGA-based accelerator for ML models Fixyfpga: Efficient fpga accelerator for deep neural networks with high element-wise sparsity and without external memory access,

Reference 43

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.444345Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation adfdc58a-919d-4119-a356-19d770033d51 · outbound

This paper cites Grasu: A fast graph update library for fpga-based dynamic graph processing,.

A survey on FPGA-based accelerator for ML models Grasu: A fast graph update library for fpga-based dynamic graph processing,

Reference 44

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.446443Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2dac8e17-1c52-4e4c-ac1f-f94d11293d41 · outbound

This paper cites Memory-efficient architecture for accelerating genera- tive networks on fpga,.

A survey on FPGA-based accelerator for ML models Memory-efficient architecture for accelerating genera- tive networks on fpga,

Reference 45

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.448264Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f9a4e5c7-7364-41c7-848e-07e9369b5c6e · outbound

This paper cites Sdma: An efficient and flexible sparse-dense matrix-multiplication architecture for gnns,.

A survey on FPGA-based accelerator for ML models Sdma: An efficient and flexible sparse-dense matrix-multiplication architecture for gnns,

Reference 46

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.450042Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 680bd521-d29c-4fcc-b9a8-dc2a5456bc48 · outbound

This paper cites Simbnn: A similarity-aware binarized neural network acceleration framework,.

A survey on FPGA-based accelerator for ML models Simbnn: A similarity-aware binarized neural network acceleration framework,

Reference 47

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.451863Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation b4cffd1a-dde7-438b-a1df-8a4c911d2797 · outbound

This paper cites Syncnn: Evaluating and accel- erating spiking neural networks on fpgas,.

A survey on FPGA-based accelerator for ML models Syncnn: Evaluating and accel- erating spiking neural networks on fpgas,

Reference 48

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.454441Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 25314a78-4d0e-4a8b-b423-d345d58d651b · outbound

This paper cites Tfr-gcn: A gcn accelerator with tile- fusing strategy,.

A survey on FPGA-based accelerator for ML models Tfr-gcn: A gcn accelerator with tile- fusing strategy,

Reference 49

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.456460Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation eb140855-1361-44eb-bb73-9c0fcc9b29e4 · outbound

This paper cites M4bram: Mixed-precision matrix-matrix multiplication in fpga block rams,.

A survey on FPGA-based accelerator for ML models M4bram: Mixed-precision matrix-matrix multiplication in fpga block rams,

Reference 50

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.458430Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 258ef026-2d10-46f9-a707-9455ee9c14fc · outbound

This paper cites Mp-opu: A mixed precision fpga-based overlay processor for convolutional neural networks,.

A survey on FPGA-based accelerator for ML models Mp-opu: A mixed precision fpga-based overlay processor for convolutional neural networks,

Reference 51

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.460433Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 6ef9e07f-6efd-4c48-b2fa-d762f6b58dc3 · outbound

This paper cites A data-center fpga acceleration platform for convolutional neural networks,.

A survey on FPGA-based accelerator for ML models A data-center fpga acceleration platform for convolutional neural networks,

Reference 52

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.463493Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 4cc7dd83-9605-44c7-82db-e3bfb41b5aef · outbound

This paper cites A low-cost reconfigurable nonlinear core for embedded dnn applications,.

A survey on FPGA-based accelerator for ML models A low-cost reconfigurable nonlinear core for embedded dnn applications,

Reference 53

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.465495Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 580ea8f5-0d94-4175-8afd-3422bda70735 · outbound

This paper cites An fpga-based mobilenet accelerator considering network structure characteristics,.

A survey on FPGA-based accelerator for ML models An fpga-based mobilenet accelerator considering network structure characteristics,

Reference 54

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.467454Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7968d430-b7da-45d4-a6fb-5846756f19b3 · outbound

This paper cites Film-qnn: Efficient fpga acceleration of deep neural networks with intra-layer, mixed-precision quantization,.

A survey on FPGA-based accelerator for ML models Film-qnn: Efficient fpga acceleration of deep neural networks with intra-layer, mixed-precision quantization,

Reference 55

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.469696Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation db1bd6bd-bc94-4c7b-bfab-4f54a6db5d03 · outbound

This paper cites Msd: Mixing signed digit representations for hardware-efficient dnn acceleration on fpga with heterogeneous resources,.

A survey on FPGA-based accelerator for ML models Msd: Mixing signed digit representations for hardware-efficient dnn acceleration on fpga with heterogeneous resources,

Reference 56

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.472386Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 80da683d-764c-4e32-9617-7123bbfe2f1b · outbound

This paper cites Hybrid dot-product calculation for convolutional neural networks in fpga,.

A survey on FPGA-based accelerator for ML models Hybrid dot-product calculation for convolutional neural networks in fpga,

Reference 57

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.474578Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation fd333d14-7026-4a23-9f85-32687a84bfa1 · outbound

This paper cites Increasing flexibility of fpga-based cnn accelerators with dynamic partial reconfiguration,.

A survey on FPGA-based accelerator for ML models Increasing flexibility of fpga-based cnn accelerators with dynamic partial reconfiguration,

Reference 58

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.476423Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 8ee96026-88e5-4029-8fab-d8a0241ebdc5 · outbound

This paper cites Light-opu: An fpga-based overlay processor for lightweight convolutional neural networks,.

A survey on FPGA-based accelerator for ML models Light-opu: An fpga-based overlay processor for lightweight convolutional neural networks,

Reference 59

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.478582Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1ad05904-975c-46e0-b106-fba571a66586 · outbound

This paper cites Reconfigurable con- volutional kernels for neural networks on fpgas,.

A survey on FPGA-based accelerator for ML models Reconfigurable con- volutional kernels for neural networks on fpgas,

Reference 60

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.480580Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 28b97999-b55d-40fc-9a3e-a21ea42da9b2 · outbound

This paper cites Towards the efficient multi-platform execution of deep neural networks,.

A survey on FPGA-based accelerator for ML models Towards the efficient multi-platform execution of deep neural networks,

Reference 61

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.482435Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c7d8d2b2-22b1-48c5-af9b-95d6a38f3e7a · outbound

This paper cites unzipfpga: Enhancing fpga-based cnn engines with on-the-fly weights genera- tion,.

A survey on FPGA-based accelerator for ML models unzipfpga: Enhancing fpga-based cnn engines with on-the-fly weights genera- tion,

Reference 62

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.484434Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation e31a2678-1fbc-4a16-a309-3211d8302cf4 · outbound

This paper cites Fpnet: Customized convolutional neural network for fpga platforms,.

A survey on FPGA-based accelerator for ML models Fpnet: Customized convolutional neural network for fpga platforms,

Reference 63

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.486496Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 637eebf0-2710-41c9-bcfd-4cd6f3105efe · outbound

This paper cites Hardware-friendly acceleration for deep neural networks with micro- structured compression,.

A survey on FPGA-based accelerator for ML models Hardware-friendly acceleration for deep neural networks with micro- structured compression,

Reference 64

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.488416Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 47f11eea-54a9-4359-b98e-651088566b99 · outbound

This paper cites From tensorflow graphs to luts and wires: Automated sparse and physically aware cnn hardware generation,.

A survey on FPGA-based accelerator for ML models From tensorflow graphs to luts and wires: Automated sparse and physically aware cnn hardware generation,

Reference 65

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.490336Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c4a486f9-dd3a-4f06-a2bc-9b039c1cd96d · outbound

This paper cites Memory-efficient dataflow inference for deep cnns on fpga,.

A survey on FPGA-based accelerator for ML models Memory-efficient dataflow inference for deep cnns on fpga,

Reference 66

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.492174Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ee0a7453-3fc1-4271-8522-e288ad033bcf · outbound

This paper cites Atheena: A toolflow for hardware early-exit network automation,.

A survey on FPGA-based accelerator for ML models Atheena: A toolflow for hardware early-exit network automation,

Reference 67

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.494666Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f06c4b38-8e84-498c-9eca-c4e2fae7f3aa · outbound

This paper cites Cnn- based feature-point extraction for real-time visual slam on embedded fpga,.

A survey on FPGA-based accelerator for ML models Cnn- based feature-point extraction for real-time visual slam on embedded fpga,

Reference 68

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.496558Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation debca538-fac5-4865-8d23-bbd10304e79c · outbound

This paper cites Dynamap: Dynamic algorithm mapping framework for low latency cnn infer- ence,.

A survey on FPGA-based accelerator for ML models Dynamap: Dynamic algorithm mapping framework for low latency cnn infer- ence,

Reference 69

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.498318Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7c75bd7c-9acd-4ca4-9c67-1bb76f82fec6 · outbound

This paper cites Extending data flow architectures for convolutional neural networks to multiple fpgas,.

A survey on FPGA-based accelerator for ML models Extending data flow architectures for convolutional neural networks to multiple fpgas,

Reference 70

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.500074Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a244140f-8437-478d-af22-6142727dbad8 · outbound

This paper cites Accelerating continual learning on edge fpga,.

A survey on FPGA-based accelerator for ML models Accelerating continual learning on edge fpga,

Reference 71

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.501867Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a9804017-c7d6-4b7d-9d50-637226542498 · outbound

This paper cites Eciton: Very low- power lstm neural network accelerator for predictive maintenance at the edge,.

A survey on FPGA-based accelerator for ML models Eciton: Very low- power lstm neural network accelerator for predictive maintenance at the edge,

Reference 72

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.503539Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 271e2779-bcda-4ccb-957a-971ae2f2265b · outbound

This paper cites Deltarnn: A power-efficient recurrent neural network accelerator,.

A survey on FPGA-based accelerator for ML models Deltarnn: A power-efficient recurrent neural network accelerator,

Reference 73

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.505226Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 91cd2b1e-d1a1-4e31-b271-6064d68e3658 · outbound

This paper cites A high energy- efficiency fpga-based lstm accelerator architecture design by structured pruning and normalized linear quantization,.

A survey on FPGA-based accelerator for ML models A high energy- efficiency fpga-based lstm accelerator architecture design by structured pruning and normalized linear quantization,

Reference 74

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.507148Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation b0f47729-16b2-44ad-ba7f-ce575e6ee378 · outbound

This paper cites A flexible design automation tool for accelerating quantized spectral cnns,.

A survey on FPGA-based accelerator for ML models A flexible design automation tool for accelerating quantized spectral cnns,

Reference 75

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.509215Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ec6a5803-4156-4d12-ac22-25e55370cfba · outbound

This paper cites Apir-dsp: An approximate pir-dsp architecture for error- tolerant applications,.

A survey on FPGA-based accelerator for ML models Apir-dsp: An approximate pir-dsp architecture for error- tolerant applications,

Reference 76

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.511336Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c4a0dab5-e0ec-4f58-bc72-bda1fa130667 · outbound

This paper cites Customizing low-precision deep neural networks for fpgas,.

A survey on FPGA-based accelerator for ML models Customizing low-precision deep neural networks for fpgas,

Reference 77

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.513189Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation afa8a68a-ec2a-48d4-aa8a-9f95f61856d9 · outbound

This paper cites Dsp-packing: Squeezing low-precision arithmetic into fpga dsp blocks,.

A survey on FPGA-based accelerator for ML models Dsp-packing: Squeezing low-precision arithmetic into fpga dsp blocks,

Reference 78

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.515138Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 236a77e9-33fd-4c03-8155-f413472b59e6 · outbound

This paper cites Embracing diversity: Enhanced dsp blocks for low-precision deep learning on fpgas,.

A survey on FPGA-based accelerator for ML models Embracing diversity: Enhanced dsp blocks for low-precision deep learning on fpgas,

Reference 79

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.517366Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation d98daad1-a668-4999-aff3-64e5288bd58d · outbound

This paper cites Ssimd: Supporting six signed multiplications in a dsp block for low-precision cnn on fpgas,.

A survey on FPGA-based accelerator for ML models Ssimd: Supporting six signed multiplications in a dsp block for low-precision cnn on fpgas,

Reference 80

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.519523Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a14b5d4f-0de5-48e5-969e-2e30160e2e61 · outbound

This paper cites Msbf-lstm: Most- significant bit-first lstm accelerators with energy efficiency optimisa- tions,.

A survey on FPGA-based accelerator for ML models Msbf-lstm: Most- significant bit-first lstm accelerators with energy efficiency optimisa- tions,

Reference 81

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.522276Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation b7e3f94c-8658-4f7e-b1fa-9addc63c68f7 · outbound

This paper cites Beyond peak performance: Comparing the real performance of ai-optimized fpgas and gpus,.

A survey on FPGA-based accelerator for ML models Beyond peak performance: Comparing the real performance of ai-optimized fpgas and gpus,

Reference 82

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.524975Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9d08b959-c98a-42af-b870-cf96154bf07c · outbound

This paper cites When massive gpu parallelism ain’t enough: A novel hardware architecture of 2d-lstm neural network,.

A survey on FPGA-based accelerator for ML models When massive gpu parallelism ain’t enough: A novel hardware architecture of 2d-lstm neural network,

Reference 83

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.527108Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 063da0ec-0b0d-48cc-bd68-5e32e28a733f · outbound

This paper cites Exploiting the potential of approximate arithmetic in dsp & ai hardware accelerators,.

A survey on FPGA-based accelerator for ML models Exploiting the potential of approximate arithmetic in dsp & ai hardware accelerators,

Reference 84

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.529156Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation d2c9b974-a182-481b-9b4b-ecf1923b08cd · outbound

This paper cites In-package domain-specific asics for intel® stratix® 10 fpgas: A case study of accelerating deep learning using tensortile asic (abstract only),.

A survey on FPGA-based accelerator for ML models In-package domain-specific asics for intel® stratix® 10 fpgas: A case study of accelerating deep learning using tensortile asic (abstract only),

Reference 85

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.531637Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ecb7a3e8-b52d-432b-8004-f02f6bb7911a · outbound

This paper cites Scaling the cascades: Interconnect-aware fpga implementation of machine learning prob- lems,.

A survey on FPGA-based accelerator for ML models Scaling the cascades: Interconnect-aware fpga implementation of machine learning prob- lems,

Reference 86

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.533541Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 778da9dc-c5ef-492c-9a5a-6e9815f45d3e · outbound

This paper cites Why compete when you can work together: Fpga-asic integration for persistent rnns,.

A survey on FPGA-based accelerator for ML models Why compete when you can work together: Fpga-asic integration for persistent rnns,

Reference 87

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.535547Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation dd77cd88-e8c5-4b7c-9965-ce78e818962b · outbound

This paper cites Causalearn: Automated framework for scalable streaming-based causal bayesian learning using fpgas,.

A survey on FPGA-based accelerator for ML models Causalearn: Automated framework for scalable streaming-based causal bayesian learning using fpgas,

Reference 88

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.537675Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 03efe3ac-46c1-437d-bbd8-93f2bae1fb0e · outbound

This paper cites Lightweight programmable dsp block overlay for streaming neural network acceleration,.

A survey on FPGA-based accelerator for ML models Lightweight programmable dsp block overlay for streaming neural network acceleration,

Reference 89

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.539629Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 8472ce53-361a-4087-95f7-b018f00008cd · outbound

This paper cites Pass: Exploiting post-activation sparsity in streaming architectures for cnn acceleration,.

A survey on FPGA-based accelerator for ML models Pass: Exploiting post-activation sparsity in streaming architectures for cnn acceleration,

Reference 90

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.541857Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 960d5751-0132-41ec-b6c9-78fc9cd304af · outbound

This paper cites Reducing dynamic power in streaming cnn hardware accelerators by exploiting computational redundancies,.

A survey on FPGA-based accelerator for ML models Reducing dynamic power in streaming cnn hardware accelerators by exploiting computational redundancies,

Reference 91

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.543817Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 6bdb0141-cab7-4d82-9a7d-1c842cb47549 · outbound

This paper cites S2n2: A fpga accelerator for streaming spiking neural networks,.

A survey on FPGA-based accelerator for ML models S2n2: A fpga accelerator for streaming spiking neural networks,

Reference 92

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.545791Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7de7f374-a73c-4c99-a416-c1e5207c7634 · outbound

This paper cites Samo: Opti- mised mapping of convolutional neural networks to streaming architec- tures,.

A survey on FPGA-based accelerator for ML models Samo: Opti- mised mapping of convolutional neural networks to streaming architec- tures,

Reference 93

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.547693Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 6a05b9f8-f095-4add-b92a-59690f99478e · outbound

This paper cites Satay: a streaming architecture toolflow for accelerating yolo models on fpga devices,.

A survey on FPGA-based accelerator for ML models Satay: a streaming architecture toolflow for accelerating yolo models on fpga devices,

Reference 94

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.549610Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a9e23e81-2b6b-4bf5-8736-58eaa09e0b2b · outbound

This paper cites Tiny on-chip memory realization of weight sparseness split-cnns on low-end fpgas,.

A survey on FPGA-based accelerator for ML models Tiny on-chip memory realization of weight sparseness split-cnns on low-end fpgas,

Reference 95

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.551463Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 721959fd-b47a-49f3-b9a7-b15047438582 · outbound

This paper cites Compute-capable block rams for efficient deep learning acceleration on fpgas,.

A survey on FPGA-based accelerator for ML models Compute-capable block rams for efficient deep learning acceleration on fpgas,

Reference 96

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.553821Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 953a203c-1845-4896-8166-7a859dcde0f2 · outbound

This paper cites A framework for graph machine learning on heterogeneous architecture,.

A survey on FPGA-based accelerator for ML models A framework for graph machine learning on heterogeneous architecture,

Reference 97

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.555618Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation fc18b453-4035-4575-8a22-cd79e9cca234 · outbound

This paper cites Automatic compiler based fpga accelerator for cnn training,.

A survey on FPGA-based accelerator for ML models Automatic compiler based fpga accelerator for cnn training,

Reference 98

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.557639Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 661b13bf-47ee-4758-b227-bdc445f24ff8 · outbound

This paper cites Hp-gnn: Generating high throughput gnn training implementation on cpu-fpga heterogeneous platform,.

A survey on FPGA-based accelerator for ML models Hp-gnn: Generating high throughput gnn training implementation on cpu-fpga heterogeneous platform,

Reference 99

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.559432Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 05778e3b-3de4-4465-a1dc-3eb5af74280a · outbound

This paper cites Logicnets: Co- designed neural networks and circuits for extreme-throughput applica- tions,.

A survey on FPGA-based accelerator for ML models Logicnets: Co- designed neural networks and circuits for extreme-throughput applica- tions,

Reference 100

Resolution: unresolved; no resolver link, observed 2026-08-11T11:14:55.561082Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Coverage vector

Reference resolution

Outbound references

Pith citing papers