Paper Citation Record · LEDGER

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models

As of 13 August 2026, this Paper Citation Record lists 24 of 24 outbound references and 4 inbound Pith citation observations for arXiv:2412.19824.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2412.19824 v2

Coverage vector

measured 24 of 24 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-11T13:54:23.227626Z

measured 28 of 28 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-13T06:32:02.005865+00:00

measured 4 of 4 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-07T11:13:46.625924Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-05-14T21:12:59.095072Z

Reference resolution

24 of 24 outbound references displayed

verified exact0
verified fuzzy24
unresolved0
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 55a9c904-0186-4080-a408-365057f31ddd · outbound

This paper cites A review of sub- uw cmos analog computing circuits for instant 1-dimensional audio signal processing in always-on edge devices,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models A review of sub- uw cmos analog computing circuits for instant 1-dimensional audio signal processing in always-on edge devices,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.550736Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 480721f9-5ce1-4dd1-b185-df54806cdae6 · outbound

This paper cites A signal-processing cmos image sensor using a simple analog operation,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models A signal-processing cmos image sensor using a simple analog operation,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.540794Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 8f36f739-7d3e-4b01-9d30-1c886796420c · outbound

This paper cites Deep Reinforcement Learning for Analog Circuit Structure Synthesis,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Deep Reinforcement Learning for Analog Circuit Structure Synthesis,

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.529366Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 66a67cbf-d44d-442e-8f3a-7f45f78c627d · outbound

This paper cites Post-layout simulation driven analog circuit sizing,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Post-layout simulation driven analog circuit sizing,

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.516266Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation abca6a80-e1cd-43b2-a603-30c540662703 · outbound

This paper cites Gcn-rl circuit designer: Transferable transistor sizing with graph neural networks and reinforcement learning,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Gcn-rl circuit designer: Transferable transistor sizing with graph neural networks and reinforcement learning,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.502700Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 4be3334b-65d1-432e-a5a1-d0523f4234c9 · outbound

This paper cites MAGICAL: An Open- Source Fully Automated Analog IC Layout System from Netlist to GDSII,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models MAGICAL: An Open- Source Fully Automated Analog IC Layout System from Netlist to GDSII,

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.487795Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation b4091e10-1396-46a6-b8bd-936edf185b16 · outbound

This paper cites Sageroute 2.0: Hierarchical analog and mixed signal routing considering versatile routing scenarios,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Sageroute 2.0: Hierarchical analog and mixed signal routing considering versatile routing scenarios,

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.473598Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 32065e8a-7acd-48a2-99b5-16679aef1e4b · outbound

This paper cites Sageroute: Synergistic analog routing considering geometric and electrical constraints with manual design compatibility,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Sageroute: Synergistic analog routing considering geometric and electrical constraints with manual design compatibility,

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.461215Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation f072fd66-f3a0-4f09-bf06-7cd8add61e62 · outbound

This paper cites The ALIGN open-source analog layout generator: V1.0 and beyond,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models The ALIGN open-source analog layout generator: V1.0 and beyond,

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.448757Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 2bec6f67-4b19-4121-9dff-2844b02b93d4 · outbound

This paper cites Dong et al.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Dong et al

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.436286Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 413655ae-043f-41fb-bd67-f0f6a936be5e · outbound

This paper cites Chain-of-thought prompting elicits reasoning in large language models,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Chain-of-thought prompting elicits reasoning in large language models,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.423429Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 4d9158c2-2a6f-495e-a4f8-80bbb33df1bc · outbound

This paper cites Tree of thoughts: Deliberate problem solving with large language models,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Tree of thoughts: Deliberate problem solving with large language models,

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.410462Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation c2f53821-4125-4e65-840a-d7edb50b3089 · outbound

This paper cites Liu et al.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Liu et al

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.397664Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation b8f5e15d-85fc-4c4c-8478-090ce4922e98 · outbound

This paper cites AnalogCoder: Analog Circuit Design via Training-Free Code Generation,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models AnalogCoder: Analog Circuit Design via Training-Free Code Generation,

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.385165Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation f1d1b654-e8ea-4034-bc6d-8df7f06c68d3 · outbound

This paper cites LaMAGIC: Language-Model-based Topology Gen- eration for Analog Integrated Circuits.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models LaMAGIC: Language-Model-based Topology Gen- eration for Analog Integrated Circuits

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.371516Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 14a600c3-fa31-4fc8-81b0-503128bd5e32 · outbound

This paper cites Artisan: Automated operational amplifier design via domain-specific large language model,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Artisan: Automated operational amplifier design via domain-specific large language model,

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.358856Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation c584df2f-e4f5-4701-9b1c-01a072937356 · outbound

This paper cites The llama 3 herd of models,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models The llama 3 herd of models,

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.345889Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation ca005bcc-805c-4c8e-b609-f3a738bba956 · outbound

This paper cites A survey on in-context learning,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models A survey on in-context learning,

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.333561Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 6c49108f-7954-4d66-b387-038177f10650 · outbound

This paper cites Self-reflection in llm agents: Effects on problem-solving performance,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Self-reflection in llm agents: Effects on problem-solving performance,

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.317930Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 6479b4dd-917f-4bfa-ae3f-0e73dd901ea3 · outbound

This paper cites Huang et al.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Huang et al

Reference 20

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.301750Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 4d48d01d-deae-4c22-8e24-6dd9e0115612 · outbound

This paper cites Large language models for mathematical reasoning: Progresses and challenges,.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Large language models for mathematical reasoning: Progresses and challenges,

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.291269Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 93a0c3ef-b092-4450-a389-19b542fdf9f0 · outbound

This paper cites Liu et al.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Liu et al

Reference 22

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.280339Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 068535be-5313-464d-b10e-6a2eb9928d03 · outbound

This paper cites Design of analog cmos integrated circuits.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Design of analog cmos integrated circuits

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.270135Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 94c4fc60-52ce-48a4-bb01-aff04afdd3b4 · outbound

This paper cites Analogdesigntoolbox.

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models Analogdesigntoolbox

Reference 24

Resolution: verified fuzzy; raw_fallback, observed 2026-08-11T13:54:23.258189Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Pith citing papers

Observation 1ceef81b-bdbc-4fa5-9989-848e1c96a65f · inbound

AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation cites this paper.

AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models

Reference 28

Resolution: unresolved; no resolver link, observed 2026-08-07T11:13:46.625924Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9b6d5627-5e8a-4a9b-85ba-d464db231dcc · inbound

AnalogFed: Privacy-Preserving Discovery of Analog Circuits at Scale with Federated Generative AI cites this paper.

AnalogFed: Privacy-Preserving Discovery of Analog Circuits at Scale with Federated Generative AI AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models

Reference 57

Resolution: unresolved; no resolver link, observed 2026-08-06T15:46:56.185733Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9bae266f-4741-41c8-8083-ac793048774b · inbound

ARCS: Autoregressive Circuit Synthesis with Topology-Aware Graph Attention and Spec Conditioning cites this paper.

ARCS: Autoregressive Circuit Synthesis with Topology-Aware Graph Attention and Spec Conditioning AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models

Reference 15

Resolution: verified exact; arxiv_id, observed 2026-05-14T21:12:59.097607Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 49b170ab-07bd-4bf8-843d-a9f682929ebe · inbound

SABLE: An NDA-Safe Closed-Loop LLM Framework for Analog Circuit Optimization in Industrial EDA Flows cites this paper.

SABLE: An NDA-Safe Closed-Loop LLM Framework for Analog Circuit Optimization in Industrial EDA Flows AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models

Reference 25

Resolution: unresolved; no resolver link, observed 2026-07-12T00:33:59.659330Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.