REVIEW 3 major objections 7 minor 3 cited by
Efficient and Scalable Agentic AI with Heterogeneous Systems
T0 review · 3 major / 7 minor · reviewed 2026-08-06 · deepseek-v4-flash
Pith's one-line read The paper claims that agentic AI workloads can be run cheaper on mixed, multi-vendor hardware than on uniform top-of-the-line GPU clusters, by scheduling each step of the agent's computation graph onto the device that fits it best.
desk verdict Well-argued systems proposal, honestly labeled preliminary, but the headline TCO result is not auditable without the underlying performance model and device counts, and the convexity claim needs a fix. read the letter →
The pith
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
The reading
What carries the argument
The load-bearing piece is the cost-aware optimization over a dataflow graph: the system represents each agent as a directed graph of tasks, estimates the resource demand of each task on each hardware class via profiled or roofline performance numbers, and solves a convex program that minimizes total execution cost subject to latency, throughput, and per-device capacity constraints. A worked prefill/decode example shows how disaggregation can satisfy a 120 ms SLA at lower cost than a homogeneous high-performance assignment, and the simulation uses the same formulation, extended to tensor and pipeline parallelism, to produce the TCO comparisons.
What would settle it
Running the same LLaMA 3-70B/FP8 workload under the stated SLAs on an H100::Gaudi 3 pair and a B200::B200 pair, with actual measured latency, throughput, power draw, and amortized hardware cost, and comparing the resulting cost per million tokens would directly confirm or overturn the paper's headline claim.
Extended reading notes
Core claim
The paper's central discovery is that agentic AI workloads decompose naturally into granular tasks with sharply different resource profiles, and that a heterogeneous hardware fleet can exploit this asymmetry: prefill is compute-bound and benefits from high TFLOPS, decode is memory-bandwidth-bound, tool calls are network-bound, and data processing runs fine on CPUs. The reported simulation results, generated by a performance model calibrated to measurements, show that for LLaMA 3 configurations the pairing B200::Gaudi 3 (prefill on B200, decode on Gaudi 3) gives the best TCO benefit, and that H100::Gaudi 3 is often comparable to or slightly better than B200::B200 under both interactive and throughput SLAs. The paper reads this as evidence that the latest homogeneous GPU generation is not required to meet agent-serving SLAs, and that incorporating already-amortized older GPUs would push the advantage further.
Load-bearing premise
The claimed TCO comparisons rest on the simulator's device latency and throughput numbers, which are described only as empirical measurements fitted to a roofline model, with no measurements, model parameters, or sensitivity analysis shown in the paper.
Editorial extensions
If this is right
- Operators can extend the life of deployed H100 infrastructure by pairing it with lower-cost decode accelerators, delaying or avoiding a full upgrade to B200-class hardware.
- Agent-serving infrastructure can be assembled from mixed-vendor fleets without sacrificing interactive latency SLAs, reducing dependence on a single accelerator vendor.
- The same optimization framework generalizes beyond LLM inference to mixed graphs of tool calls, retrieval, and CPU-side processing, so the TCO benefits should compound as agents become more heterogeneous.
- A system built on this design would provide a vendor-neutral compilation and orchestration layer, making multi-vendor hardware usable through a common IR and scheduling interface.
Reading between the lines
- The TCO advantage of H100::Gaudi 3 over B200::B200 is, in the paper, computed only in a performance model; the real-world claim would be substantially stronger if reproduced on physical hardware at production batch sizes.
- A testable prediction follows: on interactive voice-agent traffic, a mixed cluster should sustain the same SLA at higher utilization and lower cost per request than a homogeneous B200 cluster, which is a directly measurable claim for an operator.
- The framework treats cost per resource and SLA as static inputs; a natural extension, which the paper does not address, is a controller that re-optimizes placement online as prices, utilization, or traffic mix drift.
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The paper proposes a system architecture for executing agentic AI workloads on heterogeneous compute infrastructure. It introduces a graph-based workload representation, an MLIR-based compilation and orchestration stack, and a cost-aware optimization framework that assigns tasks to hardware classes under latency, throughput, and capacity constraints. The authors report preliminary TCO results from a simulated optimizer for disaggregated LLM prefill/decode, claiming that mixed configurations such as H100::Gaudi3 can match or slightly beat a homogeneous B200::B200 deployment on total cost of ownership while meeting interactive latency SLAs. The paper also includes a worked example, hardware cost-efficiency analysis, and a qualitative system design description.
Significance. The problem is timely and practically important: agentic workloads are growing, and infrastructure cost is a major deployment barrier. The paper's decomposition of agent workflows into hardware-sensitive granular tasks, its use of prefill/decode disaggregation across vendors, and its cost-per-resource analysis are useful contributions. The framework is clearly described, and the worked example in Section 3.1.2 nicely illustrates the intended optimization. If the headline TCO finding were backed by disclosed measurements and a reproducible performance model, the result would be significant for infrastructure planning. As submitted, however, the quantitative claim rests on an undisclosed model and is explicitly labeled preliminary, so the paper currently reads as an architecture proposal with an illustrative but not yet validated numerical result.
major comments (3)
- [Section 3.1.2, Constraint 3] The text claims the formulation is convex and yields a globally optimal plan, but Constraint 3, sum_i 1/t_i >= R, with t_i linear in the decision variables x_ij, is a superlevel constraint of a convex function and is not generally a convex constraint. This means the global optimality claim is unsupported for any instance in which the throughput SLA is active. Please either remove the global optimality claim, impose conditions under which the constraint set is convex, or reformulate the throughput constraint (for example, by introducing auxiliary variables and a suitable convex relaxation).
- [Section 5, Figures 8 and 9] The central TCO ordering, especially the H100::Gaudi3 versus B200::B200 comparison, depends entirely on device latency and throughput values that are described only as "empirical measurements when available" augmented by "theoretical roofline modeling" and "fit to real measurements." No measurements, fitted parameters, calibration procedure, or sensitivity analysis are presented. A first-order feasibility check using the paper's own Table 5 shows the issue is load-bearing: for LLaMA-3-70B-FP16, decoding one token requires reading approximately 140 GB of weights, and a single Gaudi3 at 3.7 TB/s has a memory-bandwidth lower bound of about 38 ms per token, above the 20 ms TBT SLA. The paper does not report whether the result uses FP8, multiple Gaudi3 devices via tensor parallelism, reduced batch sizes, or some other mechanism. Without those details and the underlying model, the headline finding is not auditable.
- [Section 5 and Section 5.1] The paper acknowledges that "These findings are preliminary, and comprehensive system validation is currently underway," yet the abstract and Section 5.1 present the H100::Gaudi3 result as a "surprising finding" and a reason to extend the life of deployed infrastructure. Given that the result is produced by an optimizer over an undisclosed performance model, the current text overstates the support for the claim. The paper should either include the full performance model and its validation or clearly reposition the TCO numbers as an illustrative modeling exercise rather than an empirical result.
minor comments (7)
- [Section 3.1.1] The bullet explaining the max term says "latency for the slowest task in the graph," but the expression is a max over resources r for a single task; it should say "latency determined by the slowest resource for task i on hardware j."
- [Section 5.2, Equations (1) and (2)] The subscripts contain typos: "NP ref illGP U" and "NDeocodeGP U" should be, respectively, the number of prefill GPUs and the number of decode GPUs.
- [Section 4.2, final paragraph] There is a typo, "This optmized graph," which should be "This optimized graph."
- [Section 5, Figure 8 caption] The "::" notation for prefill::decode device pairs is used in Figure 8 before it is defined in Section 5.1; please define the notation before its first use.
- [Table 5] The cost values are described as "averaged across a representative sample of hardware resellers" but no source, range, or sample size is given; providing the underlying data or a citation would improve reproducibility.
- [Section 5.3] The text says Gaudi3 was selected for decode in decode-intensive scenarios because of its "lowest marginal cost, as indicated in Figure 4," but Figure 4 shows cost per unit of memory bandwidth, not cost per decoded token; the connection between the two should be made explicit.
- [Section 7.3] The reference to "NVIDIA Lepton" appears to be a conflation of NVIDIA and Lepton AI; please verify and correct the name and add an appropriate citation.
Circularity Check
No significant circularity: the TCO ranking is an optimizer output, not a fitted prediction; undisclosed performance data is an audit gap, not a circularity.
full rationale
The central quantitative claim (that H100::Gaudi3 can match or slightly beat B200::B200 on TCO) is the output of the convex optimization framework in Section 3.1, evaluated with the device cost and capability inputs in Table 5 and Figure 4. The optimization objective is defined independently of the headline result: it minimizes a cost sum over task-device assignments subject to SLA and capacity constraints. Nothing in the formulation defines the conclusion in terms of the inputs, and no fitted parameter is renamed as a prediction. The Section 5.3 observation that Gaudi3 is selected for decode because it has the lowest marginal memory-bandwidth cost is a direct consequence of the cost model input, which makes the result unsurprising rather than circular; SLA feasibility is a separate non-tautological constraint that the optimizer must verify. There are no load-bearing self-citations, no imported uniqueness theorems, and no known result renamed as a new one. The paper is transparent that results are preliminary and based on a performance model fit to real measurements, and it does disclose that the model incorporates empirical measurements and roofline estimates. The absence of detailed measured TTFT/TBT values, batch sizes, and parallelism choices is a genuine auditability and verification weakness, not a circularity: those missing numbers could invalidate the claim, but they do not show that the claim reduces to its own assumptions by construction. Under the required standard of exhibiting a specific reduction, no circular step is present, so the appropriate finding is no significant circularity.
Assumptions & free parameters
free parameters (5)
- Device cost-per-resource values c_j^(r) =
Not disclosed; derived from public hardware listings (Figure 4, Table 5)
- Device latency and throughput performance model =
Not disclosed; described as empirical measurements augmented by roofline modeling
- SLA thresholds =
TTFT 250 ms, TBT 20 ms
- Amortization and utility cost assumptions =
4-year amortization, 8% interest, $0.40/kWh, max TDP
- Sequence length scenarios =
input=512/output=4096 and input=4096/output=512
assumptions (5)
- domain assumption The optimization problem in Section 3.1 is convex and admits a globally optimal solution
- domain assumption The unshown performance model accurately captures real H100, B200, Gaudi 3, MI300x, A100, and A40 behavior
- domain assumption Unconstrained hardware availability in the simulated workload
- domain assumption Static analysis passes on MLIR can extract accurate resource usage vectors theta and latency terms
- domain assumption Operating cost model excludes datacenter, colocation, and NRE costs and assumes each node runs at max TDP
Cite this review
Pith. "Pith review of Efficient and Scalable Agentic AI with Heterogeneous Systems." pith.science (2026). https://pith.science/paper/IUVM4I5V
@misc{pith2026250719635,
author = {Pith},
title = {Pith review of: Efficient and Scalable Agentic AI with Heterogeneous Systems},
year = {2026},
howpublished = {\url{https://pith.science/paper/IUVM4I5V}},
note = {Machine review of arXiv:2507.19635}
}
read the original abstract
AI agents are emerging as a dominant workload in a wide range of applications, promising to be the vehicle that delivers the promised benefits of AI to enterprises and consumers. Unlike conventional software or static inference, agentic workloads are dynamic and structurally complex. Often these agents are directed graphs of compute and IO operations that span multi-modal data input and conversion), data processing and context gathering (e.g vector DB lookups), multiple LLM inferences, tool calls, etc. To scale AI agent usage, we need efficient and scalable deployment and agent-serving infrastructure. To tackle this challenge, in this paper, we present a system design for dynamic orchestration of AI agent workloads on heterogeneous compute infrastructure spanning CPUs and accelerators, both from different vendors and across different performance tiers within a single vendor. The system delivers several building blocks: a framework for planning and optimizing agentic AI execution graphs using cost models that account for compute, memory, and bandwidth constraints of different HW; a MLIR based representation and compilation system that can decompose AI agent execution graphs into granular operators and generate code for different HW options; and a dynamic orchestration system that can place the granular components across a heterogeneous compute infrastructure and stitch them together while meeting an end-to-end SLA. Our design performs a systems level TCO optimization and preliminary results show that leveraging a heterogeneous infrastructure can deliver significant TCO benefits. A preliminary surprising finding is that for some workloads a heterogeneous combination of older generation GPUs with newer accelerators can deliver similar TCO as the latest generation homogenous GPU infrastructure design, potentially extending the life of deployed infrastructure.
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The tail at scale
Jeffrey Dean and Luiz André Barroso. The tail at scale. Communications of the ACM, 56(2):74–80, 2013
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Accessed: 2025-06-15
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https://www.roceinitiative.org/about-overview/
Reviewed August 6, 2026 · model on record in the stance chip above.
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