arxiv: 2603.06208 · v1 · submitted 2026-03-06 · 🪐 quant-ph · physics.atom-ph

Recognition: 2 theorem links

· Lean Theorem

Vertical ion transport in a surface Paul trap: escalator and elevator approaches

Alexey Russkikh , Nikita Zhadnov

Authors on Pith no claims yet

Pith reviewed 2026-05-15 15:32 UTC · model grok-4.3

classification 🪐 quant-ph physics.atom-ph

keywords surface ion trapsvertical ion transportPaul trapsQCCD architecturequantum computingRF null

0 comments

The pith

Two methods let ions move vertically in surface Paul traps, nearly doubling confinement height.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper introduces an escalator consisting of a geometrically optimized transition between trapping zones at different heights and compares it to two elevator designs that use extra electrode voltages to shift the RF null. Both techniques achieve a nearly twofold change in the ion's height above the chip. A reader would care because surface traps are the main platform for scalable quantum processors, and vertical motion adds new ways to adjust interactions and study noise.

Core claim

Both the escalator approach of geometrically optimized transitions between zones of different heights and the elevator approaches that reposition the RF null with additional electrode voltages enable nearly a twofold change in the ion confinement height above the chip surface.

What carries the argument

The escalator is a geometrically optimized transition between trapping zones of different confinement heights; elevators reposition the RF null dynamically via additional electrode voltages.

If this is right

Vertical transport allows tuning of laser-ion interaction strength by changing distance from the surface.
The methods support systematic studies of surface-induced heating mechanisms at different heights.
Ions can be precisely aligned with a mode of an external optical cavity.
The techniques add a perpendicular dimension to the existing planar QCCD transport network.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

Adding vertical shuttling to current planar networks could create full three-dimensional ion routing in quantum processors.
Dynamic height adjustment might offer a new handle for reducing surface electric-field noise during operations.
The designs could be incorporated into existing trap fabrication runs to test real-world performance against simulations.

Load-bearing premise

The electrode geometries and voltage settings will produce the simulated electric fields in a real fabricated device without unmodeled effects such as fabrication tolerances or stray charges.

What would settle it

Fabricate the proposed electrode layouts on a surface trap chip, apply the described voltages, and measure the actual ion height to check whether it reaches nearly twice the starting value.

Figures

Figures reproduced from arXiv: 2603.06208 by Alexey Russkikh, Nikita Zhadnov.

**Figure 2.** Figure 2: Pseudopotential distribution along the trans [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗

**Figure 4.** Figure 4: Optimized electrode geometry of the escalator [PITH_FULL_IMAGE:figures/full_fig_p004_4.png] view at source ↗

**Figure 3.** Figure 3: Variable points of an RF electrode along the [PITH_FULL_IMAGE:figures/full_fig_p004_3.png] view at source ↗

**Figure 6.** Figure 6: Comparison of two elevator configurations for [PITH_FULL_IMAGE:figures/full_fig_p005_6.png] view at source ↗

**Figure 5.** Figure 5: (a) Pseudopotential barrier along the ion [PITH_FULL_IMAGE:figures/full_fig_p005_5.png] view at source ↗

**Figure 7.** Figure 7: (a) Optimal widths of the central GND electrode [PITH_FULL_IMAGE:figures/full_fig_p008_7.png] view at source ↗

read the original abstract

Surface ion traps confining and manipulating tens of ion qubits have become the leading platform for quantum processors with high quantum volume. These devices employ the Quantum Charge-Coupled Device (QCCD) architecture, wherein multiple trapping zones are linked by an on-chip transport network that shuttles ion chains, enabling full connectivity through physical ion transport in a plane parallel to the chip surface. The ability to move ions perpendicular to this plane can offer additional advantages, including tuning the laser-ion interaction strength, systematic studies of surface-induced heating mechanisms, and precise alignment with a mode of an external optical cavity. We introduce an "escalator" - a geometrically optimized transition between trapping zones of different confinement heights - and present a comparative analysis of two "elevator" configurations that reposition the RF null dynamically via additional electrode voltages. Both approaches enable nearly a twofold change in the ion confinement height above the chip surface.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Desk Editor's Note private letter to a colleague

Simulation designs for vertical ion height control in surface traps are concrete but untested against fabrication realities.

read the letter

The key takeaway is that this work simulates two practical ways to move ions vertically in surface Paul traps by nearly a factor of two in height, using an escalator geometry and dynamic elevator voltage schemes. The escalator is a geometrically optimized transition between zones of different heights, and the elevators reposition the RF null with additional electrodes. Both are presented with comparative analysis, which is helpful for seeing the pros and cons. This fills a gap for QCCD systems where vertical transport could aid in tuning interactions or studying surface effects. The designs appear new and are described in enough detail to be useful for others trying to implement similar features. The simulations look standard and the claims follow from the modeled fields. No obvious errors in the approach. The soft spot is the lack of any tolerance analysis. Surface traps often have patch potentials and fabrication variations that can move the ion position by tens of percent, so the reported height ratio might not survive in a fabricated device. The paper would be stronger with some Monte Carlo runs on those effects. This paper is for researchers building scalable ion trap processors who need ideas for out-of-plane control. It deserves peer review because the concepts are solid and address a known limitation in the field, even though experiments will be required next.

Referee Report

1 major / 1 minor

Summary. The paper introduces an 'escalator' design consisting of a geometrically optimized transition between surface Paul trap zones of different confinement heights and two 'elevator' configurations that dynamically reposition the RF null using additional control electrodes. Finite-element or boundary-element simulations are used to demonstrate that both approaches achieve nearly a twofold change in ion height above the chip surface, with potential benefits for QCCD architectures including tunable laser-ion coupling and studies of surface heating.

Significance. If the simulated height ratios prove robust under real-device conditions, the work would provide concrete design tools for adding a vertical degree of freedom to surface traps, enabling new experimental capabilities in ion-based quantum processors. The comparative analysis of static geometric versus dynamic voltage-based methods is a useful contribution, though the simulation-only nature means the significance remains prospective rather than demonstrated.

major comments (1)

[Abstract and simulation results] Abstract and simulation results: The central quantitative claim of a nearly twofold height change rests on ideal simulated potentials. No Monte-Carlo tolerance analysis is reported for fabrication imperfections (electrode edge roughness, dielectric-constant variations) or patch potentials (typically 10–100 mV), which are known to shift equilibrium positions by tens of percent in surface traps and directly undermine the realizability of the reported ratio.

minor comments (1)

[Abstract] The abstract does not specify the numerical method (finite-element vs. boundary-element) or the exact simulated height ratio achieved, which would aid reproducibility.

Simulated Author's Rebuttal

1 responses · 0 unresolved

We thank the referee for the constructive feedback. The concern regarding the lack of tolerance analysis for fabrication imperfections and patch potentials is valid for a simulation-based study, and we will revise the manuscript to address it directly.

read point-by-point responses

Referee: [Abstract and simulation results] Abstract and simulation results: The central quantitative claim of a nearly twofold height change rests on ideal simulated potentials. No Monte-Carlo tolerance analysis is reported for fabrication imperfections (electrode edge roughness, dielectric-constant variations) or patch potentials (typically 10–100 mV), which are known to shift equilibrium positions by tens of percent in surface traps and directly undermine the realizability of the reported ratio.

Authors: We agree that the reported height ratios are obtained under ideal simulated conditions and that no Monte-Carlo analysis of fabrication tolerances or patch potentials is included. The manuscript focuses on demonstrating the geometric and voltage-based principles that enable the height change; real-device effects such as patch potentials (typically compensated via DC electrode tuning) and fabrication variations would require experimental calibration. We will add a dedicated discussion subsection that (i) cites literature values for typical patch-potential shifts and electrode-edge roughness, (ii) provides order-of-magnitude estimates of their impact on the reported height ratio, and (iii) outlines how voltage recalibration and design margins can mitigate these effects. This addition will qualify the quantitative claims without altering the core simulation results. revision: yes

Circularity Check

0 steps flagged

No circularity; height-change claims arise from explicit geometric and voltage design

full rationale

The manuscript introduces electrode geometries (escalator transition) and voltage schedules (elevator configurations) whose electric-field solutions are computed by standard boundary-element or finite-element methods. The reported factor-of-two change in confinement height is the direct numerical output of those solutions for the chosen electrode shapes and applied potentials; it is not obtained by fitting a parameter to a subset of results and then re-using that parameter as a prediction, nor is it defined in terms of itself. No load-bearing uniqueness theorem or ansatz is imported via self-citation, and the derivation chain contains no self-referential reduction. The work is therefore self-contained against external simulation benchmarks.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Abstract-only review; no explicit free parameters, axioms, or invented entities are stated. The designs rest on standard electrostatic modeling of Paul traps.

pith-pipeline@v0.9.0 · 5448 in / 912 out tokens · 39240 ms · 2026-05-15T15:32:53.777527+00:00 · methodology

discussion (0)

Lean theorems connected to this paper

Citations machine-checked in the Pith Canon. Every link opens the source theorem in the public Lean library.

IndisputableMonolith/Foundation/AlexanderDuality.lean alexander_duality_circle_linking unclear

?

unclear
Relation between the paper passage and the cited Recognition theorem.

We introduce an “escalator”—a geometrically optimized transition between trapping zones of different confinement heights—and present a comparative analysis of two “elevator” configurations that reposition the RF null dynamically via additional electrode voltages.
IndisputableMonolith/Cost/FunctionalEquation.lean washburn_uniqueness_aczel unclear

?

unclear
Relation between the paper passage and the cited Recognition theorem.

F0 = Σ σi Fi / Fnormi … Nelder–Mead algorithm … 10× reduction in pseudopotential magnitude

What do these tags mean?

matches: The paper's claim is directly supported by a theorem in the formal canon.
supports: The theorem supports part of the paper's argument, but the paper may add assumptions or extra steps.
extends: The paper goes beyond the formal theorem; the theorem is a base layer rather than the whole result.
uses: The paper appears to rely on the theorem as machinery.
contradicts: The paper's claim conflicts with a theorem or certificate in the canon.
unclear: Pith found a possible connection, but the passage is too broad, indirect, or ambiguous to say the theorem truly supports the claim.

Reference graph

Works this paper leans on

29 extracted references · 29 canonical work pages · 1 internal anchor

[1]

Quantum computing with trapped ions: principles, achievements, and prospects

I.V. Zalivako, N.V. Semenin, N.O. Zhad- nov, K.P. Galstyan, P.A. Kamenskikh, V.N. Smirnov, A.E. Korolkov, P.L. Sidorov, A.S. Borisenko, Yu.P. Anosov, I.A. Semerikov, K.Yu. Khabarova, and N.N. Kolachevsky. “Quantum computing with trapped ions: principles, achievements, and prospects”. Phys.-Usp.68, 552–583 (2025)

work page 2025
[2]

Architecture for a large-scale ion-trap quantum computer

D. Kielpinski, C. Monroe, and D.J. Wineland. “Architecture for a large-scale ion-trap quantum computer”. Nature417, 709–711 (2002)

work page 2002
[3]

A race-track trapped-ion quantum processor

S.A. Moses, C.H. Baldwin, M.S. Allman, R. Ancona, L. Ascarrunz, C. Barnes, J. Bar- tolotta, B. Bjork, P. Blanchard, M. Bohn, et al. “A race-track trapped-ion quantum processor”. Phys. Rev. X13, 041052 (2023)

work page 2023
[4]

Helios: A 98-qubit trapped-ion quantum computer

Quantinuum. “Helios: A 98-qubit trapped-ion quantum computer” (2025). arXiv:2511.05465

work page internal anchor Pith review arXiv 2025
[5]

Computational power of random quantum circuits in arbitrary geometries

M. DeCross, R. Haghshenas, M. Liu, E. Ri- naldi, J. Gray, Y. Alexeev, C.H. Bald- win, J.P. Bartolotta, M. Bohn, E. Chertkov, J. Cline, J. Colina, D. DelVento, J.M. Dreil- ing, C. Foltz, J.P. Gaebler, T.M. Gatterman, C.N. Gilbreth, J. Giles, D. Gresh, A. Hall, A. Hankin, A. Hansen, N. Hewitt, I. Hoff- man, C. Holliman, R.B. Hutson, T. Jacobs, J. Johansen, ...

work page 2025
[6]

Surface-electrode architecture for ion-trap quantum informa- tion processing

J. Chiaverini, R.B. Blakestad, J. Britton, J.D. Jost, C. Langer, D. Leibfried, R. Oz- eri, and D.J. Wineland. “Surface-electrode architecture for ion-trap quantum informa- tion processing”. Quantum Inf. Comput.5, 419–439 (2005)

work page 2005
[7]

Coher- ent diabatic ion transport and separation in a multizone trap array

R. Bowler, J. Gaebler, Y. Lin, T.R. 6 Tan, D. Hanneke, J.D. Jost, J.P. Home, D. Leibfried, and D.J. Wineland. “Coher- ent diabatic ion transport and separation in a multizone trap array”. Phys. Rev. Lett. 109, 080502 (2012)

work page 2012
[8]

Con- trolling fast transport of cold trapped ions

A. Walther, F. Ziesel, T. Ruster, S.T. Dawkins, K. Ott, M. Hettrich, K. Singer, F. Schmidt-Kaler, and U. Poschinger. “Con- trolling fast transport of cold trapped ions”. Phys. Rev. Lett.109, 080501 (2012)

work page 2012
[9]

Shuttling-based trapped-ion quantum information processing

V. Kaushal, B. Lekitsch, A. Stahl, J. Hilder, D. Pijn, C. Schmiegelow, A. Bermudez, M. Müller, F. Schmidt-Kaler, and U. Poschinger. “Shuttling-based trapped-ion quantum information processing”. AVS Quantum Sci.2(2020)

work page 2020
[10]

Multi-junction surface ion trap for quantum computing

J.D. Sterk, M.G. Blain, M. Delaney, R. Haltli, E. Heller, A.L. Holterhoff, T. Jen- nings, N. Jimenez, A. Kozhanov, Z. Meinelt, et al. “Multi-junction surface ion trap for quantum computing” (2024)

work page 2024
[11]

Fast ion swapping for quantum- information processing

H. Kaufmann, T. Ruster, C.T. Schmiegelow, M.A. Luda, V. Kaushal, J. Schulz, D. von Lindenfels, F. Schmidt-Kaler, and U.G. Poschinger. “Fast ion swapping for quantum- information processing”. Phys. Rev. A95, 052319 (2017)

work page 2017
[12]

Surface-electrode point paul trap

T.H. Kim, P.F. Herskind, T. Kim, J. Kim, and I.L. Chuang. “Surface-electrode point paul trap”. Phys. Rev. A82, 043412 (2010)

work page 2010
[13]

An integrated mirror and surface ion trap with a tunable trap location

A. Van Rynbach, P. Maunz, and J. Kim. “An integrated mirror and surface ion trap with a tunable trap location”. Appl. Phys. Lett.109(2016)

work page 2016
[14]

Measuring anomalous heating in a planar ion trap with variable ion-surface separa- tion

I.A. Boldin, A. Kraft, and C. Wunderlich. “Measuring anomalous heating in a planar ion trap with variable ion-surface separa- tion”. Phys. Rev. Lett.120, 023201 (2018)

work page 2018
[15]

Surface trap with dc- tunable ion-electrode distance

D. An, C. Matthiesen, A. Abdelrahman, M. Berlin-Udi, D. Gorman, S. Möller, E. Ur- ban, and H. Häffner. “Surface trap with dc- tunable ion-electrode distance”. Rev. Sci. In- strum.89(2018)

work page 2018
[16]

Trapped-ion two-qubit gates with> 99.99% fidelity without ground-state cool- ing

A.C. Hughes, R. Srinivas, C.M. Löschnauer, H.M. Knaack, R. Matt, C.J. Ballance, M.Malinowski, T.P.Harty, andR.T.Suther- land. “Trapped-ion two-qubit gates with> 99.99% fidelity without ground-state cool- ing” (2025)

work page 2025
[17]

Precise positioning of an ion in an integrated paul trap-cavity system us- ingradiofrequencysignals

E. Kassa, H. Takahashi, C. Christoforou, and M. Keller. “Precise positioning of an ion in an integrated paul trap-cavity system us- ingradiofrequencysignals”. J.Mod.Opt.65, 520–528 (2018)

work page 2018
[18]

Strong coupling of a single ion to an optical cavity

H. Takahashi, E. Kassa, C. Christoforou, and M. Keller. “Strong coupling of a single ion to an optical cavity”. Phys. Rev. Lett. 124, 013602 (2020)

work page 2020
[19]

Any- to-any connected cavity-mediated architec- ture for quantum computing with trapped ions or rydberg arrays

J. Ramette, J. Sinclair, Z. Vendeiro, A. Rudelis, M. Cetina, and V. Vuletić. “Any- to-any connected cavity-mediated architec- ture for quantum computing with trapped ions or rydberg arrays”. PRX Quantum3, 010344 (2022)

work page 2022
[20]

Ion-trap measurements of electric- field noise near surfaces

M. Brownnutt, M. Kumph, P. Rabl, and R. Blatt. “Ion-trap measurements of electric- field noise near surfaces”. Rev. Mod. Phys. 87, 1419–1482 (2015)

work page 2015
[21]

Analytic model for electro- static fields in surface-electrode ion traps

M.G. House. “Analytic model for electro- static fields in surface-electrode ion traps”. Phys. Rev. A78, 033402 (2008)

work page 2008
[22]

Quantum dynamics of sin- gle trapped ions

D. Leibfried, R. Blatt, C. Monroe, and D. Wineland. “Quantum dynamics of sin- gle trapped ions”. Rev. Mod. Phys.75, 281 (2003)

work page 2003
[23]

Surface ion trap designs for ver- tical ion shuttling

M.Y. Channa, A.H. Nizamani, H. Saleem, W.A. Bhutto, A.M. Soomro, and M.Y. Soomro. “Surface ion trap designs for ver- tical ion shuttling”. IJCSNS19, 264 (2019). url:http://paper.ijcsns.org/07_book/ 201904/20190436.pdf

work page 2019
[24]

A flexi- ble optimization method for scaling surface- electrode ion traps

W. Liu, S. Chen, and W. Wu. “A flexi- ble optimization method for scaling surface- electrode ion traps”. Appl. Phys. B117, 1149–1159 (2014)

work page 2014
[25]

Reliable transport through a micro- fabricated x-junction surface-electrode ion trap

K. Wright, J.M. Amini, D.L. Faircloth, C. Volin, S.C. Doret, H. Hayden, C.S. Pai, D.W. Landgren, D. Denison, T. Killian, et al. “Reliable transport through a micro- fabricated x-junction surface-electrode ion trap”. New J. Phys.15, 033004 (2013)

work page 2013
[26]

Op- timization and implementation of a surface- electrode ion trap junction

C. Zhang, K.K. Mehta, and J.P. Home. “Op- timization and implementation of a surface- electrode ion trap junction”. New J. Phys. 24, 073030 (2022)

work page 2022
[27]

Optimized surface ion trap de- sign for tight confinement and separation of ion chains

I. Gerasin, N. Zhadnov, K. Kudeyarov, K. Khabarova, N. Kolachevsky, and I. Se- merikov. “Optimized surface ion trap de- sign for tight confinement and separation of ion chains”. Quantum Reports6, 442– 451 (2024)

work page 2024
[28]

High-fidelity trans- port of trapped-ion qubits through an x- junction trap array

R.B. Blakestad, C. Ospelkaus, A.P. VanDe- 7 vender, J.M. Amini, J. Britton, D. Leibfried, and D.J. Wineland. “High-fidelity trans- port of trapped-ion qubits through an x- junction trap array”. Phys. Rev. Lett.102, 153002 (2009)

work page 2009
[29]

Cryogenic surface ion traps

M. Niedermayr. “Cryogenic surface ion traps”. PhD thesis. University of Innsbruck (Austria). (2015). A Initial trap design Before optimizing the transition region shape, we first determine the electrode geometry of the second (taller) trap and the transition length. For each candidate transition length, the widths of the GND and RF electrodes of the secon...

work page 2015