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arxiv: 2603.10696 · v1 · submitted 2026-03-11 · ❄️ cond-mat.mes-hall · physics.app-ph

Fast readout for large scale spin-based qubits

X. Luo , B. Bertrand , H. Niebojewski , F. Martins , C. Smith , T.-Y. Yang This is my paper

Pith reviewed 2026-05-15 13:18 UTC · model grok-4.3

classification ❄️ cond-mat.mes-hall physics.app-ph
keywords silicon quantum dotsspin qubitsPauli spin blockadegate reflectometryquantum readoutindustry fabricationdouble quantum dot
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The pith

Gate-based reflectometry enables fast Pauli spin blockade readout in industry-fabricated silicon double quantum dots

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper demonstrates fast charge sensing and spin readout of Pauli spin blockade in a silicon double quantum dot made with industry-compatible processes. Interdot couplings are tuned using a second self-aligned gate layer while readout relies on gate-based reflectometry. This setup is presented as a route to scalable readout for large spin qubit arrays. A reader would care because current qubit readouts often require non-standard fabrication that blocks large-scale integration.

Core claim

In a silicon DQD fabricated using industry-compatible processes, gate-based reflectometry performs fast charge sensing and spin readout of Pauli spin blockade phenomena, while a second self-aligned gate layer provides interdot coupling tunability, thereby demonstrating a path toward scalable fast readout of large-scale industry-standard manufactured Si spin qubit arrays.

What carries the argument

Gate-based reflectometry for charge sensing and spin readout combined with a self-aligned second gate layer to tune interdot couplings in a silicon double quantum dot

If this is right

  • Fast spin readout becomes compatible with standard silicon manufacturing flows
  • Large arrays of spin qubits can be produced without custom non-industry processes
  • Tunable interdot couplings support optimization of qubit interactions across arrays
  • Gate reflectometry reduces the need for additional charge sensor structures

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Existing semiconductor foundries could manufacture functional quantum chips with minimal process changes
  • The approach might generalize to readout in other gate-defined semiconductor qubit platforms
  • Successful scaling would lower the barrier to building processors with thousands of silicon spin qubits
  • On-chip integration of readout with classical control circuitry becomes more feasible

Load-bearing premise

The readout speed, fidelity, and tunability shown for one double quantum dot will extend to large arrays without prohibitive crosstalk, noise, or fabrication yield problems

What would settle it

Demonstrating that readout fidelity or speed falls sharply or that independent tuning of couplings becomes impossible when two or more neighboring double dots operate simultaneously would falsify the scalability claim

Figures

Figures reproduced from arXiv: 2603.10696 by B. Bertrand, C. Smith, F. Martins, H. Niebojewski, T.-Y. Yang, X. Luo.

Figure 1
Figure 1. Figure 1: shows the typical device microstructures of the devices reported in this work. Active regions of the devices are obtained starting from a 300 mm silicon-on-insulator (SOI) wafer patterned in a MESA isolation integration. A TiN/polySi gate stack is deposited and patterned in a self-aligned scheme, This paragraph of the first footnote will contain the date on which you submitted your paper for review. X. Luo… view at source ↗
Figure 2
Figure 2. Figure 2: Schematic top-view of a silicon transistor consisting of eight quantum dot plunger gates (T- and B-gates) and five coupling gates (J￾gates). An LC resonator is connected to gate T2 for reflectometry sensing. (b) Cross-section schematic along the dashed line in (a). (c) Circuit diagram of a double quantum dot and reflectometry sensor. CC and CG are the LC resonator coupling capacitance and gate capacitance,… view at source ↗
Figure 5
Figure 5. Figure 5: ICT measurements at various coupling gate voltages [PITH_FULL_IMAGE:figures/full_fig_p003_5.png] view at source ↗
read the original abstract

In this letter, we present fast readout of Pauli spin blockade phenomena and interdot coupling tunability in a silicon double quantum dot (DQD) fabricated using industry-compatible processes. The interdot couplings are tuned with a second self-aligned gate layer. The charge sensing and spin readout are performed by using gate-based reflectometry techniques. The results pave the way for scalable fast readout of large-scale industry-standard manufactured Si spin qubit arrays.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 1 minor

Summary. The manuscript reports an experimental demonstration of fast readout of Pauli spin blockade and tunable interdot coupling in a single silicon double quantum dot fabricated with industry-compatible processes. Charge sensing and spin readout use gate-based reflectometry, with interdot coupling tuned via a second self-aligned gate layer. The authors conclude that the results pave the way for scalable fast readout in large-scale Si spin qubit arrays.

Significance. A successful single-device demonstration of industry-compatible fabrication and reflectometry-based readout would be a useful incremental step toward silicon spin qubits, particularly if the tunability and speed metrics prove reproducible. However, because the work contains no array-level data, the significance for large-scale integration is prospective and depends on untested assumptions about crosstalk and yield.

major comments (2)
  1. [Abstract] Abstract and concluding paragraph: the claim that the results 'pave the way for scalable fast readout of large-scale industry-standard manufactured Si spin qubit arrays' is not supported by the presented evidence. All data (reflectometry spectra, charge stability diagrams, coupling tuning) are obtained from one isolated DQD; no multi-device statistics, nearest-neighbor crosstalk measurements, or fabrication-yield data are shown.
  2. [Results] Results section (description of reflectometry spectra and Pauli spin blockade visibility): no quantitative metrics (readout fidelity, error bars, integration time, or signal-to-noise ratio) are reported, so the adjective 'fast' cannot be evaluated against existing benchmarks or used to justify the scalability extrapolation.
minor comments (1)
  1. The manuscript would benefit from explicit statements of the measured readout bandwidth, charge-sensor sensitivity, and any observed charge-noise spectrum to allow direct comparison with prior Si DQD reflectometry work.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the careful reading of our manuscript and the constructive comments provided. We address each major point below and outline the revisions we will make to strengthen the paper.

read point-by-point responses

  1. Referee: [Abstract] Abstract and concluding paragraph: the claim that the results 'pave the way for scalable fast readout of large-scale industry-standard manufactured Si spin qubit arrays' is not supported by the presented evidence. All data (reflectometry spectra, charge stability diagrams, coupling tuning) are obtained from one isolated DQD; no multi-device statistics, nearest-neighbor crosstalk measurements, or fabrication-yield data are shown.

    Authors: We agree that all presented data come from a single double quantum dot and that the manuscript does not include multi-device statistics, crosstalk measurements, or yield data. The original phrasing was intended to indicate that the demonstrated techniques (industry-compatible fabrication and gate-based reflectometry) are compatible with scaling, but we recognize that this is prospective. We will revise the abstract and concluding paragraph to state that the work demonstrates fast reflectometry readout of Pauli spin blockade and tunable coupling in an industry-fabricated silicon DQD, providing a building block toward scalable arrays, while explicitly noting that array-level characterization remains for future work. revision: yes

  2. Referee: [Results] Results section (description of reflectometry spectra and Pauli spin blockade visibility): no quantitative metrics (readout fidelity, error bars, integration time, or signal-to-noise ratio) are reported, so the adjective 'fast' cannot be evaluated against existing benchmarks or used to justify the scalability extrapolation.

    Authors: We accept that quantitative performance metrics are needed to substantiate the term 'fast' and to enable direct comparison with prior work. Although the reflectometry spectra demonstrate clear, high-visibility signals consistent with rapid acquisition, we will add explicit values for integration time, signal-to-noise ratio, and any available fidelity estimates to the revised Results section. These additions will allow readers to benchmark the readout speed against existing literature. revision: yes

Circularity Check

0 steps flagged

No circularity: pure experimental report with no derivations

full rationale

The manuscript presents experimental measurements of Pauli spin blockade and gate-based reflectometry on a single silicon double quantum dot fabricated with industry processes. No equations, fitted parameters, theoretical derivations, or predictions are introduced that could reduce to their own inputs by construction. The central claim that results 'pave the way for scalable fast readout' is an interpretive extrapolation from data rather than a self-referential mathematical step. No self-citations, ansatzes, or uniqueness theorems are invoked as load-bearing elements. The work is therefore self-contained against external benchmarks with no detectable circularity.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Experimental demonstration paper; no mathematical derivations, free parameters, or new entities introduced. Relies on standard semiconductor physics and established reflectometry techniques.

pith-pipeline@v0.9.0 · 5372 in / 846 out tokens · 40386 ms · 2026-05-15T13:18:16.869786+00:00 · methodology

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Reference graph

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