arxiv: 2605.00399 · v1 · submitted 2026-05-01 · 💻 cs.CE

Recognition: unknown

Transient Multiscale Workflow for Thermal Analysis of 3DHI Chip Stack

Jacob S. Merson, Max O. Bloomfield, Mohammad Elahi, Theodorian Borca-Tasciuc

Authors on Pith no claims yet

Pith reviewed 2026-05-09 19:07 UTC · model grok-4.3

classification 💻 cs.CE

keywords transient thermal analysis3DHI chip stackBEOL homogenizationmultiscale workflowGDSII OASISthermal property mapsrepresentative volume elementstemporal scale separation

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The pith

A workflow demonstrates transient thermal analysis of 3D chip stacks by homogenizing 3D heterogeneous BEOL structures from design files.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper establishes a transient thermal workflow for 3D heterogeneous integrated chip stacks that incorporates detailed back-end-of-line structures. It addresses problems involving both strong and weak temporal scale separations in heat flow. The method automatically extracts and homogenizes thermal properties like conductivity and heat capacity from GDSII and OASIS layout files to build property maps. This matters for modern designs using backside power delivery and stacked chiplets, where accurate transient hot-spot prediction is needed. The approach is demonstrated on sample dies with different grid resolutions and provides expressions for effective transient conductivity.

Core claim

The paper demonstrates a transient thermal workflow that accounts for the 3D heterogeneous structures in the BEOL for problems with strong- and weak- temporal scale separation. Property maps for heat capacity and conductivity are generated for a 1 mm by 1 mm SoC-style model die using 100 by 100 grids with 5 micron RVEs and 50 by 50 grids with 10 micron RVEs. Expressions for transient effective conductivity are provided, the impact of transient effects is shown for a single RVE, and transient conductivity maps are given for a timestep of 0.001, all under the assumption of temperature independent constitutive properties.

What carries the argument

The transient multiscale homogenization workflow that automatically processes GDSII and OASIS files into thermal property maps using representative volume elements and expressions for transient effective conductivity.

If this is right

Transient simulations can now include fine-scale BEOL heterogeneity without resolving every feature at all times.
Both strong and weak temporal scale separations in thermal problems can be handled within the same framework.
Design files can be directly converted to thermal models for time-dependent analysis.
The workflow produces usable conductivity and heat capacity maps for specific timesteps like 0.001.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

Such maps could be used to speed up larger system-level simulations by replacing detailed regions with homogenized equivalents.
Extending the workflow to temperature-dependent properties would broaden its applicability to high-power scenarios.
Validation against physical measurements on fabricated test chips would confirm the homogenized predictions.

Load-bearing premise

The workflow relies on the assumption that thermal conductivity and heat capacity do not change with temperature.

What would settle it

A side-by-side comparison of the workflow's transient temperature predictions against a fully resolved 3D transient simulation of the same heterogeneous structure would falsify the claim if the results diverge beyond acceptable numerical tolerances.

Figures

Figures reproduced from arXiv: 2605.00399 by Jacob S. Merson, Max O. Bloomfield, Mohammad Elahi, Theodorian Borca-Tasciuc.

**Figure 1.** Figure 1: Tile-based dominance map of the LibreLane-generated view at source ↗

**Figure 2.** Figure 2: (a) Metal stack from a representative 5 µm × 5 µm RVE. Shown with the dielectric removed for visualization, this RVE has a volumetric heat capacity of 2.229 J/g.K and axisaligned κ values of κ¯xx = 12.5, κ¯yy = 6.85, and κ¯zz = 4.65 W/m.K. (b) A similar 10 µm × 10 µm RVE placed at the same point on the die. This RVE has a volumetric heat capacity of 2.227 J/g.K and axis-aligned κ values of κ¯xx = 10.5, κ¯… view at source ↗

**Figure 4.** Figure 4: Spatial maps of the effective volumetric heat capacity view at source ↗

**Figure 5.** Figure 5: Impact of transient contributions to the homoge view at source ↗

**Figure 3.** Figure 3: Spatial maps of the axis-aligned effective thermal view at source ↗

**Figure 6.** Figure 6: Spatial maps of the axis-aligned effective transient view at source ↗

**Figure 9.** Figure 9: Top-surface temperature field comparison for the view at source ↗

read the original abstract

Modern package designs make use of technologies such as backside power delivery (BSPD) and 3D stacked chiplets that require accounting for the heterogeneity in back end of the line (BEOL) structures in hot-spot prediction. Multiscale homogenization strategies have been demonstrated to be effective for steady-state simulations, however accurate 3D transient simulations that include BEOL structures remain an open challenge. In this work, we demonstrate a transient thermal workflow that accounts for the 3D heterogeneous structures in the BEOL for problems with strong- and weak- temporal scale separation under the assumption of temperature independent constitutive properties. Our workflow, based on Bloomfield et. al. 2025, automatically extracts, meshes, and homogenizes thermal properties from GDSII and OASIS files to construct thermal property maps. Property maps (heat capacity and conductivity) have been generated for a 1 mm by 1 mm SoC-style model die that was constructed with LibreLane for 100 by 100 grids with 5 micron by 5 micron representative volume elements (RVEs), and 50 by 50 grids with 10 micron by 10 micron RVEs. The expressions for a transient effective conductivity are provided and a demonstration of the impact of the transient effects are provided for a single RVE. Finally, transient conductivity maps have been provided for a time integration timestep of dt=0.001.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Desk Editor's Note private letter to a colleague

The paper adds transient effective conductivity expressions and automated map generation for a model 3D chip die but stops short of running or validating any full multiscale transient simulations.

read the letter

The main takeaway is that they have extended the prior steady-state homogenization to transient cases by deriving effective conductivity expressions and using them to build heat-capacity and conductivity maps from GDSII files for a constructed SoC-style die. The automation of extraction, meshing, and map creation at two grid resolutions (100x100 with 5um RVEs and 50x50 with 10um RVEs) is practical and clearly described. They also show a single-RVE example of how transient effects appear and supply the expressions for a fixed timestep of dt=0.001. That part is straightforward and could be picked up by someone who already runs a transient thermal solver and wants precomputed BEOL properties.

Referee Report

2 major / 2 minor

Summary. The paper presents a transient multiscale thermal analysis workflow for 3D heterogeneous integration (3DHI) chip stacks, extending steady-state homogenization methods to handle BEOL heterogeneity in transient simulations. Building on Bloomfield et al. 2025, the workflow automatically extracts, meshes, and homogenizes thermal properties (heat capacity and conductivity) from GDSII and OASIS files to generate property maps on 100x100 (5um RVE) and 50x50 (10um RVE) grids for a 1mm x 1mm SoC-style die. It provides expressions for transient effective conductivity, demonstrates transient effects on a single RVE, and produces conductivity maps for a fixed timestep dt=0.001, under the assumption of temperature-independent constitutive properties, targeting problems with strong- and weak-temporal scale separation.

Significance. If the full workflow including end-to-end transient multiscale simulations and validations were demonstrated, it would provide a practical tool for accurate hot-spot prediction in modern 3D stacked packages with complex BEOL structures, potentially reducing computational cost compared to full 3D transient simulations while maintaining fidelity for scale-separated problems. The automation from design files is a notable strength for reproducibility and applicability.

major comments (2)

[Results and abstract description of demonstrations] The central claim of demonstrating a transient thermal workflow that accounts for 3D heterogeneous BEOL structures in problems with strong- and weak-temporal scale separation is not supported by the presented evidence. The results are limited to property map generation via homogenization, expressions for transient effective conductivity, a single-RVE illustration of transient effects, and maps for dt=0.001; no end-to-end multiscale transient simulations applying the maps in a time integrator, nor any verification or comparison against reference 3D heterogeneous transient solutions for different scale separations, are shown. This leaves the transient capability untested.
[Expressions for transient effective conductivity] The expressions for transient effective conductivity are stated to be provided, but without visible derivation details or extension from the steady-state base in Bloomfield et al. 2025, it is unclear how they rigorously capture transient scale separation effects beyond the homogenization step.

minor comments (2)

[Introduction and assumptions] The assumption of temperature-independent constitutive properties is central but its validity range or sensitivity in transient regimes is not discussed or tested.
[Results] No error analysis, grid convergence studies, or quantitative metrics (e.g., comparison of homogenized vs. direct simulation) are reported for the generated maps or single-RVE case.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the careful and constructive review. We address each major comment below, acknowledging limitations in the current demonstrations and outlining targeted revisions to align claims with presented results while improving clarity on the transient extensions.

read point-by-point responses

Referee: The central claim of demonstrating a transient thermal workflow that accounts for 3D heterogeneous BEOL structures in problems with strong- and weak-temporal scale separation is not supported by the presented evidence. The results are limited to property map generation via homogenization, expressions for transient effective conductivity, a single-RVE illustration of transient effects, and maps for dt=0.001; no end-to-end multiscale transient simulations applying the maps in a time integrator, nor any verification or comparison against reference 3D heterogeneous transient solutions for different scale separations, are shown. This leaves the transient capability untested.

Authors: We agree that the manuscript does not include full end-to-end multiscale transient simulations or direct verifications against heterogeneous 3D reference solutions. The presented work centers on extending the homogenization workflow to transient regimes by generating timestep-dependent property maps (conductivity and heat capacity) from layout files and demonstrating transient effects at the single-RVE level. These maps are intended as inputs for larger-scale transient solvers in scale-separated problems. We will revise the abstract, introduction, and conclusions to precisely describe the scope as the homogenization and map-generation steps of the transient workflow, rather than implying complete system-level transient simulations. A new discussion subsection will outline how the maps integrate into time integrators and note verification as future work. revision: partial
Referee: The expressions for transient effective conductivity are stated to be provided, but without visible derivation details or extension from the steady-state base in Bloomfield et al. 2025, it is unclear how they rigorously capture transient scale separation effects beyond the homogenization step.

Authors: The transient effective conductivity expressions extend the steady-state homogenization by incorporating the heat-capacity term from the transient heat equation, yielding a timestep-dependent effective conductivity that reflects the balance between conduction and thermal storage within the RVE. We will add a dedicated subsection with a complete derivation, beginning from the steady-state formulation in Bloomfield et al. 2025, showing the modifications for the transient case, the role of RVE size and timestep in capturing scale separation, and the resulting expressions. This will make the extension explicit and rigorous. revision: yes

Circularity Check

1 steps flagged

Transient workflow builds on self-cited prior homogenization; results limited to map generation without end-to-end transient verification

specific steps

self citation load bearing [Abstract]
"Our workflow, based on Bloomfield et. al. 2025, automatically extracts, meshes, and homogenizes thermal properties from GDSII and OASIS files to construct thermal property maps."

The transient workflow's ability to handle strong- and weak-temporal scale separation is asserted via this self-citation to the base homogenization method. The presented results (property maps on 100x100/50x50 grids, transient conductivity expressions, single-RVE demo, and dt=0.001 maps) apply the prior method but do not independently derive or verify the transient multiscale integration, reducing the central demonstration to the cited prior work.

full rationale

The paper's core claim is a demonstrated transient multiscale workflow for BEOL structures under temporal scale separation. It explicitly states the workflow is 'based on Bloomfield et. al. 2025' for automatic extraction, meshing, and homogenization to produce property maps. Results consist of grid-based maps, expressions for transient effective conductivity, a single-RVE transient illustration, and maps at fixed dt=0.001. No comparative multiscale transient simulations or verification against full 3D heterogeneous solutions are described. This creates moderate self-citation dependence for the load-bearing homogenization step while the transient expressions add some independent content, justifying score 4 rather than higher.

Axiom & Free-Parameter Ledger

2 free parameters · 1 axioms · 0 invented entities

The claim depends on the prior homogenization framework and the temperature-independence assumption. The grid and timestep choices are ad hoc for the demonstration.

free parameters (2)

grid size (100x100 with 5um RVE or 50x50 with 10um RVE)
Selected for the 1mm x 1mm model die to demonstrate the workflow at different resolutions.
time integration timestep (dt=0.001)
Chosen for generating the transient conductivity maps.

axioms (1)

domain assumption temperature independent constitutive properties
Explicitly stated as the assumption under which the workflow operates.

pith-pipeline@v0.9.0 · 5563 in / 1346 out tokens · 49553 ms · 2026-05-09T19:07:54.657178+00:00 · methodology

discussion (0)

Reference graph

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