Recognition: unknown
Distributed Quantum Error Correction with Bivariate Bicycle Codes in a Modular Architecture
Pith reviewed 2026-05-08 17:39 UTC · model grok-4.3
The pith
Bivariate bicycle codes can be distributed across multiple quantum processors connected by Bell pairs while keeping logical error rates manageable under a nonlocal noise scaling factor.
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
Core claim
We partition the qubits of the [[144,12,12]] BB code across 4, 6, and 12 quantum processors and analyze the resulting logical error rates and pseudo-threshold performance under circuit level noise by varying the number of processors and a scaling factor that captures the additional noise associated with nonlocal operations. We use Monte Carlo simulations with BP+OSD decoding and extend the previously known BB code ansatz to the distributed setting.
What carries the argument
The star network that links processors via shared Bell pairs for inter-processor gates, combined with qubit partitioning of the bivariate bicycle code and BP+OSD decoding.
If this is right
- Logical error rates rise with more processors but stay below physical rates for moderate scaling factors on nonlocal gates.
- Pseudo-thresholds give a practical benchmark for when the distributed code still improves over raw physical qubits.
- All-to-all connectivity inside each processor allows the full set of local stabilizer measurements without extra cost.
- The results supply concrete design rules for choosing how many processors to use for a given noise budget.
- The same partitioning and scaling approach applies to other qLDPC codes in modular hardware.
Where Pith is reading between the lines
- Platforms that already support all-to-all gates locally, such as trapped ions or neutral atoms, become especially attractive for high-rate codes.
- Better partitions that reduce the number of crossing stabilizers could lower the required scaling factor and raise thresholds.
- Real entanglement distribution hardware can be tested against the scaling model to check whether unaccounted network noise appears.
- The modular route may let quantum computers grow by adding processors rather than by enlarging single chips.
Load-bearing premise
The extra noise from nonlocal operations can be captured by a single scaling factor and the star network introduces no other unmodeled errors.
What would settle it
Hardware runs or refined simulations in which logical error rates rise faster than predicted or pseudo-thresholds disappear entirely once the number of processors reaches 12 or the nonlocal scaling factor exceeds the values tested.
Figures
read the original abstract
Quantum low density parity check (qLDPC) codes, particularly bivariate bicycle (BB) codes, achieve competitive fault tolerance thresholds while offering substantially higher encoding rates than planar surface codes. However, their intrinsically long-range stabilizer structure makes them difficult to implement on monolithic devices with nearest neighbor connectivity and limited qubit capacity. In this work, we study the realization of a BB code in a modular multiprocessor architecture, where quantum processors are interconnected through shared Bell pairs. We consider processors with all to all internal connectivity, which is feasible on trapped ion and neutral atom platforms, enabling flexible local gate execution while inter-processor (nonlocal) gates are mediated by shared entanglement. We describe a star network architecture that can realize this distributed setting. We partition the qubits of the [[144,12,12]] BB code across 4, 6, and 12 quantum processors and analyze the resulting logical error rates and pseudo-threshold performance under circuit level noise by varying the number of processors and a scaling factor that captures the additional noise associated with nonlocal operations. We use Monte Carlo simulations with BP+OSD decoding and extend the previously known BB code ansatz to the distributed setting. Our results provide architectural insight and design considerations for distributed BB codes in modular quantum computing architectures.
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The manuscript studies a distributed implementation of the [[144,12,12]] bivariate bicycle (BB) qLDPC code in a modular architecture. Qubits are partitioned across 4, 6, or 12 processors connected by a star network that distributes shared Bell pairs; nonlocal gates are modeled by scaling local circuit-level noise rates by a tunable factor. Monte Carlo simulations with BP+OSD decoding are used to extract logical error rates and pseudo-thresholds as functions of processor count and the nonlocal scaling factor, with an extension of the BB code ansatz to the distributed setting.
Significance. If the noise model is shown to be representative, the results supply concrete architectural guidance for realizing high-rate qLDPC codes on modular platforms (trapped ions, neutral atoms) that already support all-to-all local connectivity. The empirical performance curves under varying processor counts and the explicit extension of the BB ansatz constitute a useful data point for the design of distributed fault-tolerant quantum processors.
major comments (2)
- [Abstract and circuit-level noise model description] The central performance claims rest on modeling all inter-processor effects (Bell-pair distribution, entanglement swapping, routing) solely by a uniform multiplicative scaling of local noise rates. This assumption is load-bearing for the reported logical error rates and pseudo-thresholds; if the star network introduces heralded loss, time-correlated errors, or new Pauli channels, the quantitative conclusions would change. The manuscript should either derive or simulate the effective noise model from the underlying entanglement-generation protocol rather than parameterizing it by a single free factor.
- [Distributed ansatz and decoding section] The extension of the BB code ansatz to the distributed setting (partitioning stabilizers across processors) is described only at a high level. It is unclear whether the resulting parity-check matrix remains sparse enough for BP+OSD to retain its reported performance, or whether additional decoding overheads arise from the nonlocal syndrome extraction. A concrete description of the modified Tanner graph or stabilizer generators after partitioning would be required to assess decoder optimality.
minor comments (2)
- [Simulation results] The manuscript does not report error bars on the Monte Carlo logical error rates or the precise number of shots used to estimate pseudo-thresholds; these details are needed to judge the statistical significance of the performance differences across processor counts.
- [Noise model] Notation for the nonlocal scaling factor is introduced without an explicit symbol or equation; a short definition (e.g., Eq. (X)) would improve clarity when the factor is varied in the figures.
Simulated Author's Rebuttal
We thank the referee for their thorough review and valuable feedback on our manuscript. We have carefully considered the major comments and revised the manuscript to address them where possible.
read point-by-point responses
-
Referee: [Abstract and circuit-level noise model description] The central performance claims rest on modeling all inter-processor effects (Bell-pair distribution, entanglement swapping, routing) solely by a uniform multiplicative scaling of local noise rates. This assumption is load-bearing for the reported logical error rates and pseudo-thresholds; if the star network introduces heralded loss, time-correlated errors, or new Pauli channels, the quantitative conclusions would change. The manuscript should either derive or simulate the effective noise model from the underlying entanglement-generation protocol rather than parameterizing it by a single free factor.
Authors: We acknowledge that our noise model relies on a simplified parameterization via a scaling factor for nonlocal operations. This choice allows us to explore a range of architectural scenarios without committing to a specific hardware implementation. In the revised manuscript, we have added a new subsection discussing the limitations of this model, including potential impacts from heralded losses, time-correlated errors, and additional Pauli channels. We also provide bounds on how deviations from the uniform scaling might affect the results. However, a full derivation from a specific entanglement-generation protocol is beyond the current scope, as it would require detailed assumptions about the physical layer that are not the focus of this work. We believe the current approach provides useful insights into the sensitivity to nonlocal noise. revision: partial
-
Referee: [Distributed ansatz and decoding section] The extension of the BB code ansatz to the distributed setting (partitioning stabilizers across processors) is described only at a high level. It is unclear whether the resulting parity-check matrix remains sparse enough for BP+OSD to retain its reported performance, or whether additional decoding overheads arise from the nonlocal syndrome extraction. A concrete description of the modified Tanner graph or stabilizer generators after partitioning would be required to assess decoder optimality.
Authors: We appreciate this comment and agree that more detail is needed. In the revised manuscript, we have expanded the description of the distributed ansatz in Section 3. We now include explicit examples of the stabilizer generators for each partitioning (4, 6, and 12 processors), the corresponding parity-check matrices, and confirm that the sparsity (maximum row and column weights) remains unchanged from the original BB code. We also describe the modified Tanner graph and note that the BP+OSD decoder performance is preserved because the graph structure retains its low-density properties. Regarding decoding overheads from nonlocal syndrome extraction, we have added analysis showing that the additional communication does not introduce significant latency in the decoding process under our assumptions. revision: yes
Circularity Check
No significant circularity; results from independent Monte Carlo simulations
full rationale
The paper performs Monte Carlo simulations of logical error rates and pseudo-thresholds for partitioned [[144,12,12]] BB codes under circuit-level noise, using BP+OSD decoding and a tunable scaling factor for nonlocal operations. No equations or claims reduce a prediction to a fitted input by construction, nor does any load-bearing step rely on self-citation chains or self-definitional ansatzes. The scaling factor is explicitly varied as a modeling parameter rather than derived, and the extension of the BB ansatz is presented as an adaptation for the distributed setting without circular reduction to prior outputs. The analysis is self-contained against external simulation benchmarks.
Axiom & Free-Parameter Ledger
free parameters (1)
- nonlocal noise scaling factor
axioms (2)
- domain assumption Circuit-level noise model applies to distributed gates via Bell pairs
- domain assumption BP+OSD decoder performs optimally in this setting
Reference graph
Works this paper leans on
-
[1]
1.2 quantum computing – toward large-scale fault-tolerant quantum computing,
H. Riel, “1.2 quantum computing – toward large-scale fault-tolerant quantum computing,” in2026 IEEE International Solid-State Circuits Conference (ISSCC). IEEE, Feb. 2026, p. 16–22. [Online]. Available: http://dx.doi.org/10.1109/ISSCC49663.2026.11409084
-
[2]
Tour de gross: A modular quantum computer based on bivariate bicycle codes
T. J. Yoder, E. Schoute, P. Rall, E. Pritchett, J. M. Gambetta, A. W. Cross, M. Carroll, and M. E. Beverland, “Tour de gross: A modular quantum computer based on bivariate bicycle codes,” 2025. [Online]. Available: https://arxiv.org/abs/2506.03094
work page internal anchor Pith review arXiv 2025
-
[3]
Q-Fly: An Optical Interconnect for Modular Quantum Computers,
D. Sakuma, T. Tsuno, H. Shimizu, Y. Kurosawa, M. T. Friedrich, K. Teramoto, A. Taherkhani, A. Todd, Y. Ueno, M. Hajdušek, R. Ikuta, R. V. Meter, T. Sasaki, and S. Nagayama, “Q-fly: An optical interconnect for modular quantum computers,” 2025. [Online]. Available: https://arxiv.org/abs/2412.09299
-
[4]
H. T. Larasati and B.-S. Choi, “Towards fault-tolerant distributed quantum computation (ft-dqc): Taxonomy, recent progress, and challenges,”ICT Express, vol. 11, no. 3, p. 417–435, Jun. 2025. [Online]. Available: http://dx.doi.org/10.1016/j.icte.2025.03.007
-
[5]
J. Knörzer, X. Liu, B. F. Schiffer, and J. Tura, “Distributed quantum information processing: A review of recent progress,” 2025. [Online]. Available: https://arxiv.org/abs/2510.15630
-
[6]
Physical Review A89, 022317 (2014).https://doi
C. Monroe, R. Raussendorf, A. Ruthven, K. R. Brown, P. Maunz, L.-M. Duan, and J. Kim, “Large-scale modular quantum-computer architecture with atomic memory and photonic interconnects,” Physical Review A, vol. 89, no. 2, Feb. 2014. [Online]. Available: http://dx.doi.org/10.1103/PhysRevA.89.022317
-
[7]
Fault- tolerant connection of error-corrected qubits with noisy links,
J. Ramette, J. Sinclair, N. P. Breuckmann, and V. Vuletić, “Fault- tolerant connection of error-corrected qubits with noisy links,”npj Quantum Information, vol. 10, no. 1, Jun. 2024. [Online]. Available: http://dx.doi.org/10.1038/s41534-024-00855-4
-
[8]
N. K. Chandra, E. Kaur, and K. P. Seshadreesan, “Architectural approaches to fault-tolerant distributed quantum computing and their entanglement overheads,” in2025 IEEE 7th International Conference on Trust, Privacy and Security in Intelligent Systems, and Applications (TPS-ISA). IEEE, Nov. 2025, p. 561–572. [Online]. Available: http://dx.doi.org/10.1109/...
-
[9]
Predict and Con- quer: Navigating Algorithm Trade-Offs with Quantum Design Automation
N. K. Chandra, D. Tipper, R. Nejabati, E. Kaur, and K. P. Seshadreesan, “Distributed realization of color codes for quantum error correction,” in2025 IEEE International Conference on Quantum Computing and Engineering (QCE). IEEE, Aug. 2025, p. 2482–2492. [Online]. Available: http://dx.doi.org/10.1109/QCE65121.2025.00269
-
[10]
N. K. Chandra, S. Guha, and K. P. Seshadreesan, “Multiplexed bilayered realization of fault-tolerant quantum computation over optically networked trapped-ion modules,”IEEE Transactions on Quantum Engineering, vol. 7, p. 1–18, 2026. [Online]. Available: http://dx.doi.org/10.1109/TQE.2025.3649617
-
[11]
A short introduction to quantum error correction,
T. L. de Macedo Guedes, “A short introduction to quantum error correction,”Brazilian Journal of Physics, vol. 56, no. 2, Feb. 2026. [Online]. Available: http://dx.doi.org/10.1007/s13538-026-02007-9
-
[12]
Towards distributed quantum error correction for distributed quantum computing,
S. Babaie and C. Qiao, “Towards distributed quantum error correction for distributed quantum computing,” 2024. [Online]. Available: https://arxiv.org/abs/2409.05244
-
[13]
Distributed quantum error correction with permutation-invariant approximate codes,
C. Clayton and B. Avritzer, “Distributed quantum error correction with permutation-invariant approximate codes,” 2025. [Online]. Available: https://arxiv.org/abs/2509.25093
-
[14]
Predict and Con- quer: Navigating Algorithm Trade-Offs with Quantum Design Automation
E. Sutcliffe, B. Jonnadula, C. Le Gall, A. E. Moylett, and C. M. Westoby, “Distributed quantum error correction based on hyperbolic floquet codes,” in2025 IEEE International Conference on Quantum Computing and Engineering (QCE). IEEE, Aug. 2025, p. 649–657. [Online]. Available: http://dx.doi.org/10.1109/QCE65121.2025.00076
-
[15]
S. Bravyi, A. W. Cross, J. M. Gambetta, D. Maslov, P. Rall, and T. J. Yoder, “High-threshold and low-overhead fault-tolerant quantum memory,”Nature, vol. 627, no. 8005, p. 778–782, Mar. 2024. [Online]. Available: http://dx.doi.org/10.1038/s41586-024-07107-7
-
[16]
Toward a 2d local implementation of quantum low-density parity-check codes,
N. Berthusen, D. Devulapalli, E. Schoute, A. M. Childs, M. J. Gullans, A. V. Gorshkov, and D. Gottesman, “Toward a 2d local implementation of quantum low-density parity-check codes,” PRX Quantum, vol. 6, no. 1, Jan. 2025. [Online]. Available: http://dx.doi.org/10.1103/PRXQuantum.6.010306
-
[17]
G. Zhao, F. Yan, and X. Ni, “A simple universal routing strategy for reducing the connectivity requirements of quantum ldpc codes,” 2025. [Online]. Available: https://arxiv.org/abs/2509.00850
-
[18]
Quantum error correction for long chains of trapped ions,
M. Ye and N. Delfosse, “Quantum error correction for long chains of trapped ions,”Quantum, vol. 9, p. 1920, Nov. 2025. [Online]. Available: http://dx.doi.org/10.22331/q-2025-11-27-1920
-
[19]
Demonstration of low-overhead quantum error correction codes,
K. Wanget al., “Demonstration of low-overhead quantum error correction codes,”Nature Physics, vol. 22, no. 2, p. 308–314, Jan. 2026. [Online]. Available: http://dx.doi.org/10.1038/s41567-025-03157-4
-
[20]
Fault-tolerant optical interconnects for neutral-atom arrays,
J. Sinclair, J. Ramette, B. Grinkemeyer, D. Bluvstein, M. D. Lukin, and V. Vuletić, “Fault-tolerant optical interconnects for neutral-atom arrays,” Physical Review Research, vol. 7, no. 1, Mar. 2025. [Online]. Available: http://dx.doi.org/10.1103/PhysRevResearch.7.013313
-
[21]
Quantum low-density parity-check codes,
B. Vasic, V. Savin, M. Pacenti, S. Borah, and N. Raveendran, “Quantum low-density parity-check codes,” 2025. [Online]. Available: https://arxiv.org/abs/2510.14090
-
[22]
Placing and routing quantum LDPC codes in multilayer superconducting hardware
M. Mathews, L. Pahl, D. Pahl, V. L. Addala, C. Tang, W. D. Oliver, and J. A. Grover, “Placing and routing quantum ldpc codes in multilayer superconducting hardware,” 2025. [Online]. Available: https://arxiv.org/abs/2507.23011
work page internal anchor Pith review arXiv 2025
-
[23]
P. Webster, L. Berent, O. Chandra, E. T. Hockings, N. Baspin, F. Thomsen, S. C. Smith, and L. Z. Cohen, “The pinnacle architecture: Reducing the cost of breaking rsa-2048 to 100 000 physical qubits using quantum ldpc codes,” 2026. [Online]. Available: https://arxiv.org/abs/2602.11457
work page internal anchor Pith review Pith/arXiv arXiv 2048
-
[24]
Teo, Joshua Viszlai, and Fred Chong
W. Yang, J. Chadwick, M. H. Teo, J. Viszlai, and F. Chong, “Spacetime- efficient and hardware-compatible complex quantum logic units in qldpc codes,” 2026. [Online]. Available: https://arxiv.org/abs/2602.14273
-
[25]
C. Poole, T. M. Graham, M. A. Perlin, M. Otten, and M. Saffman, “Architecture for fast implementation of quantum low-density parity-check codes with optimized rydberg gates,”Physical Review A, vol. 111, no. 2, Feb. 2025. [Online]. Available: http://dx.doi.org/10.1103/PhysRevA.111. 022433
-
[26]
Lowering connectivity requirements for bivariate bicycle codes using morphing circuits,
M. H. Shaw and B. M. Terhal, “Lowering connectivity requirements for bivariate bicycle codes using morphing circuits,”Physical Review Letters, vol. 134, no. 9, Mar. 2025. [Online]. Available: http://dx.doi.org/10.1103/PhysRevLett.134.090602
-
[27]
Quantum low-density parity-check codes for modular architectures,
A. Strikis and L. Berent, “Quantum low-density parity-check codes for modular architectures,”PRX Quantum, vol. 4, no. 2, May 2023. [Online]. Available: http://dx.doi.org/10.1103/PRXQuantum.4.020321
-
[28]
Distributed fault-tolerant quantum memories over a 2xl array of qubit modules,
E. Tham, M. Ye, I. Khait, J. Gamble, and N. Delfosse, “Distributed fault-tolerant quantum memories over a 2xl array of qubit modules,”
-
[29]
Available: https://arxiv.org/abs/2508.01879
[Online]. Available: https://arxiv.org/abs/2508.01879
-
[30]
K. S. Chou, J. Z. Blumoff, C. S. Wang, P. C. Reinhold, C. J. Axline, Y. Y. Gao, L. Frunzio, M. H. Devoret, L. Jiang, and R. J. Schoelkopf, “Deterministic teleportation of a quantum gate between two logical qubits,”Nature, vol. 561, no. 7723, p. 368–373, Sep. 2018. [Online]. Available: http://dx.doi.org/10.1038/s41586-018-0470-y
-
[31]
LDPC: Python tools for low density parity check codes,
J. Roffe, “LDPC: Python tools for low density parity check codes,”
-
[32]
Available: https://pypi.org/project/ldpc/
[Online]. Available: https://pypi.org/project/ldpc/
-
[33]
Decoding across the quan- tum low-density parity-check code landscape
J. Roffe, D. R. White, S. Burton, and E. Campbell, “Decoding across the quantum low-density parity-check code landscape,”Physical Review Research, vol. 2, no. 4, Dec 2020. [Online]. Available: http://dx.doi.org/10.1103/PhysRevResearch.2.043423
-
[34]
High-threshold and low-overhead fault-tolerant quan- tum memory,
S. Bravyiet al., “High-threshold and low-overhead fault-tolerant quan- tum memory,” https://github.com/sbravyi/BivariateBicycleCodes, 2024, gitHub repository
2024
-
[35]
Á. G. Iñesta, H. Choi, D. Englund, and S. Wehner, “Quantum circuit switching with one-way repeaters in star networks,” in 2024 IEEE International Conference on Quantum Computing and Engineering (QCE). IEEE, Sep. 2024, p. 1857–1867. [Online]. Available: http://dx.doi.org/10.1109/QCE60285.2024.00215
-
[36]
Network operations scheduling for distributed quantum computing,
N. K. Chandra, E. Kaur, and K. P. Seshadreesan, “Network operations scheduling for distributed quantum computing,” in2024 IEEE 6th International Conference on Trust, Privacy and Security in Intelligent Systems, and Applications (TPS-ISA). IEEE, Oct. 2024, p. 506–515. [Online]. Available: http://dx.doi.org/10.1109/TPS-ISA62245.2024.00068
-
[37]
Quantum repeaters: The role of imperfect local operations in quantum communication,
H.-J. Briegel, W. Dür, J. I. Cirac, and P. Zoller, “Quantum repeaters: The role of imperfect local operations in quantum communication,” Physical Review Letters, vol. 81, no. 26, p. 5932–5935, Dec. 1998. [Online]. Available: http://dx.doi.org/10.1103/PhysRevLett.81.5932
-
[38]
Optimal routing and end-to-end entanglement distribution in quantum networks,
J. Halder, A. Rajabov, R. Bassoli, F. H. P. Fitzek, and G. P. Fettweis, “Optimal routing and end-to-end entanglement distribution in quantum networks,”Scientific Reports, vol. 14, no. 1, Aug. 2024. [Online]. Available: http://dx.doi.org/10.1038/s41598-024-70114-1
-
[39]
D. C. Montgomery, E. A. Peck, and G. G. Vining,Introduction to linear regression analysis. John Wiley & Sons, 2021
2021
discussion (0)
Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.