pith. machine review for the scientific record. sign in

arxiv: 2605.05932 · v1 · submitted 2026-05-07 · 📡 eess.SY · cs.SY

Recognition: unknown

Consideration of Control-Loop Interaction in Transient Stability of Grid-Following Inverters using Bandwidth Separation Method

Hsiao-Dong Chiang, Timothy C. Green, Yifan Zhang, Yitong Li, Yue Zhu, Yunjie Gu

Pith reviewed 2026-05-08 07:10 UTC · model grok-4.3

classification 📡 eess.SY cs.SY
keywords grid-following inverterstransient stabilityphase-locked loopDC-link voltage controlbandwidth separationvoltage instabilitycontrol loop interaction
0
0 comments X

The pith

DVC-PLL interaction in grid-following inverters degrades transient stability and shrinks the stability region

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper proposes the bandwidth separation method as an asymptotic analysis tool to simplify the nonlinear differential equations governing transient stability in grid-following inverters. It explicitly characterizes the coupling between the DC-link voltage control (DVC) loop and the phase-locked loop (PLL), demonstrating that this coupling reduces stability margins. The analysis concludes that voltage instability typically precedes and causes loss of synchronism, rather than PLL desynchronization occurring in isolation. These results matter for renewable integration because they supply practical bandwidth tuning rules that improve fault tolerance without requiring full-order simulations.

Core claim

The bandwidth separation method performs order reduction on the full dynamic model when the PLL, DVC, and TVC loops have sufficiently separated bandwidths. This reduction reveals that DVC-PLL interaction shrinks the stability region and that voltage collapse, rather than PLL loss of synchronization alone, is the dominant mechanism of transient instability. The method also yields explicit guidelines: larger PLL bandwidth improves resilience to phase-jump faults, larger DVC bandwidth improves tolerance to power swings, and high TVC bandwidth counteracts the destabilizing PLL-DVC coupling.

What carries the argument

The bandwidth separation method, an asymptotic analysis technique that simplifies and reduces the order of the inverter's differential equations when the PLL, DVC, and TVC loops operate at distinctly different bandwidths.

If this is right

  • Larger PLL bandwidth improves resilience to phase-jump faults.
  • Larger DVC bandwidth enhances tolerance to power fluctuations.
  • High TVC bandwidth mitigates the destabilizing effects of PLL-DVC interaction.
  • The overall stability region contracts when DVC-PLL coupling is present.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same separation technique could be used to analyze stability in other multi-loop inverter controls that include current or power references.
  • Design priorities may shift toward preserving voltage margins rather than maximizing synchronization speed during faults.
  • Bandwidth tuning rules derived here provide testable starting points for field calibration of commercial inverters.

Load-bearing premise

Sufficient separation must exist between the bandwidths of the PLL, DVC, and TVC loops for the asymptotic simplifications and order reduction to remain valid.

What would settle it

A hardware-in-the-loop test or simulation that produces transient instability from PLL desynchronization alone while terminal voltage remains bounded would contradict the claim that voltage instability is the typical root cause.

Figures

Figures reproduced from arXiv: 2605.05932 by Hsiao-Dong Chiang, Timothy C. Green, Yifan Zhang, Yitong Li, Yue Zhu, Yunjie Gu.

Figure 1
Figure 1. Figure 1: System diagram of grid-following inverter. view at source ↗
Figure 2
Figure 2. Figure 2: Example curve of p(id) (solid line on upper axes) and stability region (ROA) of DVC (lower axes) when ωpll ≫ ωdvc. 2) Determine the stability region, Ωm of the intermediate￾speed control loop. At this stage, the fastest loop is reduced to an algebraic equation, while the slowest loop variables remain constant. 3) Determine the stability region, Ωs of the slowest control loop. At this stage, the other two c… view at source ↗
Figure 3
Figure 3. Figure 3: Theoretical and simulation results under view at source ↗
Figure 4
Figure 4. Figure 4: Curve of h(δ) and stability region of PLL when ωdvc ≫ ωpll. error of order O(ε). The full derivation and boundary-layer corrections are detailed in Appendix B. id = Pin + iqUg sin δ Ug cos δ (8a) ( ˙δ = kp,pll λ(δ) · [XgPin − h (δ)] + Pin λ(δ) · xint,pll x˙ int_pll = ki,pll λ(δ) · [XgPin − h (δ) + PinLg · xint,pll] (8b) where, h (δ) =Ug 2 2 sin 2δ − iqXgUg sin δ = Ug 2 2 sin 2δ (if iq = 0) λ (δ) = Ug cos δ… view at source ↗
Figure 5
Figure 5. Figure 5: Theoretical and simulation results under view at source ↗
Figure 6
Figure 6. Figure 6: Curve of p ′ (id) and stability region of DVC when ωtvc and ωpll ≫ ωdvc view at source ↗
Figure 7
Figure 7. Figure 7: Curve of h ′ (δ) and stability region of PLL when ωtvc ≫ ωdvc ≫ ωpll. −iq = kv kvXg + 1 · (Vref − Ug cos δ) (10b) ( ˙δ = kp,pll λ(δ) · [XgPin − h ′ (δ)] + Pin λ(δ) · xint,pll x˙ int_pll = ki,pll λ(δ) · [XgPin − h ′ (δ) + PinLg · xint,pll] (10c) TABLE I ROA COMPARISON AND PARAMETERS FEASIBLE REGION UNDER DIFFERENT CONTROL LOOP CONFIGURATIONS Parameter PLL-alone (id is fixed) Bandwidth sequence ωpll ≫ ωdvc B… view at source ↗
Figure 8
Figure 8. Figure 8: The phase portrait comparison between simulation and reduced-order view at source ↗
Figure 9
Figure 9. Figure 9: HIL experimental platform. Table A1 in Appendix C. Three typical faults, including voltage sag fault, phase jump, and input power variation are emulated by the OPAL-RT real-time simulator. The controller is implemented by the DSP TMS320F28379. The controller acquires analog signals from the OP5707XG and generates PWM signals to drive the IGBT switches of the GFL inverter. Both the IGBT switching frequency … view at source ↗
Figure 10
Figure 10. Figure 10: PLL standalone system under 0.6 pu voltage sag fault with view at source ↗
Figure 11
Figure 11. Figure 11: GFL inverter under 0.9 pu voltage sag fault with slow TVC view at source ↗
Figure 12
Figure 12. Figure 12: GFL inverter under 0.9 pu voltage sag fault without fault clearance, view at source ↗
Figure 13
Figure 13. Figure 13: GFL inverter under 0.6 pu voltage sag fault with fast TVC view at source ↗
Figure 14
Figure 14. Figure 14: Phase portraits of phase jump fault under view at source ↗
Figure 15
Figure 15. Figure 15: Time-domain results for GFL inverter under 25 degree phase jump view at source ↗
Figure 16
Figure 16. Figure 16: Phase portrait under input power step changes from 0, 0.2 pu, and view at source ↗
Figure 17
Figure 17. Figure 17: Time-domain results of the GFL inverter under input power step view at source ↗
Figure 18
Figure 18. Figure 18: Time-domain response of the GFL inverter during restart. The output view at source ↗
read the original abstract

Grid-following inverters have been widely adopted as a grid interface for renewable energy, and ensuring their small-signal and large-signal stability is critical to modern power systems. Their large-signal, or transient, stability is a significant challenge to analyze because of the interaction of the phase-locked loop (PLL), which must maintain synchronism with various outer-loop controllers. Simple analysis in which outer-loop controllers are idealized is insufficient, and the interactions between the nonlinear dynamics of the PLL and the dynamics of the DC-link voltage control (DVC), as well as the AC terminal voltage control (TVC) when present, must be considered. An asymptotic analysis approach, termed the bandwidth separation method, is proposed. This method enables simplification and order reduction of the original differential equations when sufficient bandwidth separation exists. Through this method, the interaction between the DVC and PLL is explicitly characterized, revealing that such interaction degrades system stability and shrinks the stability region. The analysis also indicates that voltage instability, rather than PLL loss of synchronization alone, is often the root cause of transient instability. Optimal bandwidth configurations for the PLL and DVC are identified under various grid fault conditions: a larger PLL bandwidth improves resilience to phase-jump faults, while a larger DVC bandwidth enhances tolerance to power fluctuations. In addition, the influence of the TVC loop is analyzed, showing that a high TVC bandwidth can mitigate the destabilizing effects of PLL-DVC interaction and further improve transient stability. All analytical findings are validated through hardware-in-the-loop (HIL) experiments.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The paper proposes an asymptotic 'bandwidth separation method' to simplify and reduce the order of the nonlinear ODEs describing grid-following inverter dynamics when sufficient separation exists among the PLL, DVC, and TVC bandwidths. It explicitly characterizes the DVC-PLL interaction, concluding that this interaction degrades transient stability and shrinks the stability region, with voltage instability (rather than PLL loss of synchronization) often the root cause. The work identifies optimal bandwidth configurations (larger PLL bandwidth for phase-jump faults, larger DVC for power fluctuations), shows that high TVC bandwidth mitigates destabilizing effects, and validates all findings via HIL experiments.

Significance. If the bandwidth-separation assumptions hold, the method supplies a useful analytical tool for dissecting control-loop interactions in inverter transient stability beyond idealized outer-loop models. The explicit interaction characterization, identification of voltage instability as a dominant mechanism, and bandwidth-tuning guidelines have direct implications for renewable-grid control design. Credit is due for the HIL validation and for deriving falsifiable predictions on bandwidth effects from the asymptotic reduction rather than fitted parameters.

major comments (2)
  1. [§3 (Bandwidth Separation Method)] §3 (Bandwidth Separation Method): The central claims on interaction effects and voltage instability as root cause rest on the asymptotic order reduction justified by bandwidth separation. The paper should supply explicit conditions, bounds, or robustness checks showing when the separation remains valid under abrupt operating-point shifts and saturations that occur in severe faults, because violation of the assumption could render the reduced-model conclusions artifacts of the approximation rather than properties of the original nonlinear system.
  2. [§4–5 (Interaction Analysis and Stability Region)] §4–5 (Interaction Analysis and Stability Region): The assertion that voltage instability, not PLL desynchronization, is typically the root cause requires stronger direct evidence, such as side-by-side comparison of reduced-order versus full-order trajectories or stability boundaries under the same fault scenarios, to confirm the reduced model preserves the dominant mechanism.
minor comments (2)
  1. [Abstract] Abstract: Limited detail is given on the precise derivation steps of the order reduction, error bounds of the asymptotic approximation, and exact HIL fault parameters (duration, depth, grid impedance), which would improve reproducibility and scope clarity.
  2. [Notation and Equations] Notation: Ensure uniform definition and use of bandwidth symbols (e.g., ω_PLL, ω_DVC) and time-scale parameters across the reduced equations and figures to prevent ambiguity in the simplification steps.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive feedback and positive assessment of the significance of the bandwidth separation method. The comments correctly identify areas where additional rigor on the approximation's validity and direct validation of the reduced-order dynamics would strengthen the manuscript. We address each major comment below.

read point-by-point responses

  1. Referee: The central claims on interaction effects and voltage instability as root cause rest on the asymptotic order reduction justified by bandwidth separation. The paper should supply explicit conditions, bounds, or robustness checks showing when the separation remains valid under abrupt operating-point shifts and saturations that occur in severe faults.

    Authors: We agree that explicit conditions and robustness checks are needed to ensure the reduced-model conclusions are not artifacts. The bandwidth separation method is grounded in singular perturbation theory for systems with separated time scales. In the revised manuscript, we will add a new subsection in §3 that derives explicit bounds on the required bandwidth ratios (e.g., PLL bandwidth at least an order of magnitude larger than DVC bandwidth, with quantitative estimates based on the singular perturbation parameter ε) and includes numerical robustness checks. These checks will compare full-order and reduced-order trajectories during severe faults that induce saturations and abrupt shifts, confirming the range of validity and that the identified interaction effects persist in the original system. revision: yes

  2. Referee: The assertion that voltage instability, not PLL desynchronization, is typically the root cause requires stronger direct evidence, such as side-by-side comparison of reduced-order versus full-order trajectories or stability boundaries under the same fault scenarios, to confirm the reduced model preserves the dominant mechanism.

    Authors: We concur that side-by-side comparisons would provide stronger, direct evidence. In the revision, we will augment §4 and §5 with new figures that overlay time-domain trajectories (DC-link voltage, PLL frequency, and terminal voltage) from the full-order nonlinear model against the reduced-order model for the same fault scenarios (phase-jump and power-fluctuation cases). We will also compare the analytically derived stability regions from the reduced model with numerically computed boundaries from the full-order system. These additions will explicitly demonstrate that the reduced model preserves voltage instability as the dominant mechanism. revision: yes

Circularity Check

0 steps flagged

No significant circularity; derivation uses standard asymptotic reduction under explicit assumption

full rationale

The paper's central derivation applies an asymptotic bandwidth-separation method to reduce the full nonlinear ODEs of PLL, DVC, and TVC dynamics, then characterizes the resulting interaction terms and stability region. This reduction is performed under the stated assumption of sufficient time-scale separation between loops; the simplified equations are not obtained by fitting parameters to the target stability metrics or by defining the interaction in terms of itself. No load-bearing self-citations, uniqueness theorems imported from prior author work, or ansatzes smuggled via citation are present in the provided derivation chain. The claims about destabilizing DVC-PLL interaction and voltage instability as root cause are direct consequences of the reduced model rather than tautological restatements of the inputs. The approach is therefore self-contained against external benchmarks and receives the default non-circularity finding.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

The central claim rests primarily on the domain assumption of sufficient bandwidth separation for asymptotic reduction; no free parameters or new entities are introduced in the abstract description.

axioms (1)
  • domain assumption Sufficient bandwidth separation exists between control loops to enable simplification and order reduction of the system differential equations.
    This is invoked as the basis for the bandwidth separation method to characterize PLL-DVC interactions.

pith-pipeline@v0.9.0 · 5600 in / 1400 out tokens · 67045 ms · 2026-05-08T07:10:01.685011+00:00 · methodology

discussion (0)

Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.

Reference graph

Works this paper leans on

35 extracted references · 1 canonical work pages

  1. [1]

    Overview of control and grid synchronization for distributed power generation systems,

    F. Blaabjerg, R. Teodorescu, M. Liserre, and A. Timbus, “Overview of control and grid synchronization for distributed power generation systems,”IEEE Transactions on Industrial Electronics, vol. 53, no. 5, pp. 1398–1409, 2006

    2006

  2. [2]

    Power system stability with a high penetration of inverter-based resources,

    Y . Gu and T. C. Green, “Power system stability with a high penetration of inverter-based resources,”Proceedings of the IEEE, 2022

    2022

  3. [3]

    Grid-synchronization stability of converter-based resources—an overview,

    X. Wang, M. G. Taul, H. Wu, Y . Liao, F. Blaabjerg, and L. Harne- fors, “Grid-synchronization stability of converter-based resources—an overview,”IEEE Open Journal of Industry Applications, vol. 1, pp. 115– 134, 2020

    2020

  4. [4]

    An overview of assessment methods for synchronization stability of grid-connected converters under severe symmetrical grid faults,

    M. G. Taul, X. Wang, P. Davari, and F. Blaabjerg, “An overview of assessment methods for synchronization stability of grid-connected converters under severe symmetrical grid faults,”IEEE Transactions on Power Electronics, vol. 34, no. 10, pp. 9655–9670, 2019

    2019

  5. [5]

    Large signal synchronizing instability of pll-based vsc connected to weak ac grid,

    Q. Hu, L. Fu, F. Ma, and F. Ji, “Large signal synchronizing instability of pll-based vsc connected to weak ac grid,”IEEE Transactions on Power Systems, vol. 34, no. 4, pp. 3220–3229, 2019

    2019

  6. [6]

    Large-signal stability of grid-forming and grid-following controls in voltage source converter: A comparative study,

    X. Fu, J. Sun, M. Huang, Z. Tian, H. Yan, H. H.-C. Iu, P. Hu, and X. Zha, “Large-signal stability of grid-forming and grid-following controls in voltage source converter: A comparative study,”IEEE Transactions on Power Electronics, vol. 36, no. 7, pp. 7832–7840, 2020

    2020

  7. [7]

    Transient stability analysis of grid-tied converters considering pll’s nonlinearity,

    X. He, H. Geng, and S. Ma, “Transient stability analysis of grid-tied converters considering pll’s nonlinearity,”CPSS Transactions on Power Electronics and Applications, vol. 4, no. 1, pp. 40–49, 2019

    2019

  8. [8]

    Design-oriented transient stability analysis of pll- synchronized voltage-source converters,

    H. Wu and X. Wang, “Design-oriented transient stability analysis of pll- synchronized voltage-source converters,”IEEE Transactions on Power Electronics, vol. 35, no. 4, pp. 3573–3589, 2019

    2019

  9. [9]

    Generalized swing equation and transient synchronous stability with pll-based vsc,

    R. Ma, J. Li, J. Kurths, S. Cheng, and M. Zhan, “Generalized swing equation and transient synchronous stability with pll-based vsc,”IEEE Transactions on Energy Conversion, vol. 37, no. 2, pp. 1428–1441, 2021

    2021

  10. [10]

    Nonlinear and transient stability analysis of phase-locked loops in grid-connected converters,

    J. Zhao, M. Huang, H. Yan, C. K. Tse, and X. Zha, “Nonlinear and transient stability analysis of phase-locked loops in grid-connected converters,”IEEE Transactions on Power Electronics, vol. 36, no. 1, pp. 1018–1029, 2020

    2020

  11. [11]

    Stability of dc-link voltage as affected by phase locked loop in vsc when attached to weak grid,

    P. Zhou, X. Yuan, J. Hu, and Y . Huang, “Stability of dc-link voltage as affected by phase locked loop in vsc when attached to weak grid,” in 2014 IEEE PES General Meeting| Conference & Exposition. IEEE, 2014, pp. 1–5

    2014

  12. [12]

    Effect of control-loops interactions on power stability limits of vsc integrated to ac system,

    Y . Huang and D. Wang, “Effect of control-loops interactions on power stability limits of vsc integrated to ac system,”IEEE Transactions on Power Delivery, vol. 33, no. 1, pp. 301–310, 2017

    2017

  13. [13]

    Impact of non-minimum-phase zeros on the weak-grid-tied vsc,

    G. Wu, B. Zhao, X. Zhang, S. Wang, A. Egea-Alvarez, Y . Sun, Y . Li, D. Guo, and X. Zhou, “Impact of non-minimum-phase zeros on the weak-grid-tied vsc,”IEEE Transactions on Sustainable Energy, vol. 12, no. 2, pp. 1115–1126, 2020

    2020

  14. [14]

    Nonlinear modeling and analysis of grid-connected voltage-source converters under voltage dips,

    Z. Yang, R. Ma, S. Cheng, and M. Zhan, “Nonlinear modeling and analysis of grid-connected voltage-source converters under voltage dips,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 8, no. 4, pp. 3281–3292, 2020

    2020

  15. [15]

    Optimal controller design for transient stability enhancement of grid-following converters under weak-grid conditions,

    M. G. Taul, C. Wu, S.-F. Chou, and F. Blaabjerg, “Optimal controller design for transient stability enhancement of grid-following converters under weak-grid conditions,”IEEE Transactions on Power Electronics, vol. 36, no. 9, pp. 10 251–10 264, 2021

    2021

  16. [16]

    Impact of dc-link voltage control on transient stability of pll-synchronized voltage-source converters,

    T. Liu, X. Wang, and F. Liu, “Impact of dc-link voltage control on transient stability of pll-synchronized voltage-source converters,” in 2022 International Power Electronics Conference (IPEC-Himeji 2022- ECCE Asia). IEEE, 2022, pp. 435–439

    2022

  17. [17]

    Impact of dc-bus voltage control on synchronization stability of grid-tied inverters,

    D. Pal and B. K. Panigrahi, “Impact of dc-bus voltage control on synchronization stability of grid-tied inverters,”IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 6, pp. 2782–2786, 2022

    2022

  18. [18]

    Transient stability analysis of grid-connected converter with considering dc-link dynamics,

    Y . Ling, M. Huang, X. Zha, W. Li, D. Jiang, and J. Li, “Transient stability analysis of grid-connected converter with considering dc-link dynamics,” in2024 CPSS & IEEE International Symposium on Energy Storage and Conversion (ISESC), 2024, pp. 786–792

    2024

  19. [19]

    Transient stability analysis of grid-following converters with dc-link voltage control consid- ering bidirectional power flow,

    Y . Wang, H. Nian, M. Li, D. Sun, H. Li, and H. Li, “Transient stability analysis of grid-following converters with dc-link voltage control consid- ering bidirectional power flow,” inIECON 2023-49th Annual Conference of the IEEE Industrial Electronics Society. IEEE, 2023, pp. 1–5

    2023

  20. [20]

    Online assessment of transient stability of grid connected pv generator with dc link voltage and reactive power control,

    I. R. S. Priyamvada and S. Das, “Online assessment of transient stability of grid connected pv generator with dc link voltage and reactive power control,”IEEE Access, vol. 8, pp. 220 606–220 619, 2020

    2020

  21. [21]

    Transient stability analysis and enhancement of grid-following converters considering dc voltage dynamics under power step,

    Z. Huang, C. Wu, Y . Wang, and S. Li, “Transient stability analysis and enhancement of grid-following converters considering dc voltage dynamics under power step,” in2024 IEEE 10th International Power Electronics and Motion Control Conference (IPEMC2024-ECCE Asia), 2024, pp. 2401–2405

    2024

  22. [22]

    Consideration of control- loop interaction in transient stability of grid-following inverters using bandwidth separation method,

    Y . Zhang, Y . Li, Y . Gu, and T. C. Green, “Consideration of control- loop interaction in transient stability of grid-following inverters using bandwidth separation method,” in2023 11th International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia), 2023, pp. 1294–1301

    2023

  23. [23]

    Reactive Power Compensation Control of PV Systems for Improved Power Transfer Capability in IEEE TRANSACTIONS ON POWER ELECTRONICS 15 Weak Grid,

    C. Zhao, D. Sun, H. Nian, and Y . Fan, “Reactive Power Compensation Control of PV Systems for Improved Power Transfer Capability in IEEE TRANSACTIONS ON POWER ELECTRONICS 15 Weak Grid,” in2020 12th IEEE PES Asia-Pacific Power and Energy Engineering Conference (APPEEC). IEEE, 2020, pp. 1–5

    2020

  24. [24]

    Grid Code—High and Extra High V oltage. E. ON Netz GmbH,

    E. Netz, “Grid Code—High and Extra High V oltage. E. ON Netz GmbH,”Tech. Rep, 2006

    2006

  25. [25]

    Requirements for offshore grid connections in the grid of tennet tso gmbh,

    T. Tenne, “Requirements for offshore grid connections in the grid of tennet tso gmbh,”Arnhem, Netherlands, 2012

    2012

  26. [26]

    D. R. Smith,Singular-perturbation theory: an introduction with appli- cations. Cambridge University Press, 1985

    1985

  27. [27]

    H. K. Khalil,Nonlinear Systems. USA: Prentice-Hall, 1996

    1996

  28. [28]

    On nonlinear singularly perturbed initial value prob- lems,

    R. O’Malley, Jr, “On nonlinear singularly perturbed initial value prob- lems,”SIAM review, vol. 30, no. 2, pp. 193–212, 1988

    1988

  29. [29]

    Chiang and L

    H.-D. Chiang and L. F. Alberto,Stability Regions of Nonlinear Dy- namical Systems: Theory, Estimation, and Applications. Cambridge University Press, 2015

    2015

  30. [30]

    Chaos in fast-slow systems,

    C. Kuehn and C. Kuehn, “Chaos in fast-slow systems,”Multiple Time Scale Dynamics, pp. 431–475, 2015

    2015

  31. [31]

    Power system stability and control,

    P. Kundur, “Power system stability and control,”New York: McGraw, 1994

    1994

  32. [32]

    Analysis of dq small-signal impedance of grid-tied inverters,

    B. Wen, D. Boroyevich, R. Burgos, P. Mattavelli, and Z. Shen, “Analysis of dq small-signal impedance of grid-tied inverters,”IEEE Transactions on Power Electronics, vol. 31, no. 1, pp. 675–687, 2015

    2015

  33. [33]

    Whole-System First-Swing Stability of Inverter-Based Inertia-Free Power Systems,

    Y . Li and Y . Gu, “Whole-System First-Swing Stability of Inverter-Based Inertia-Free Power Systems,”arXiv preprint arXiv:2207.03292, 2022

    work page arXiv 2022

  34. [34]

    Revisiting grid-forming and grid- following inverters: A duality theory,

    Y . Li, Y . Gu, and T. C. Green, “Revisiting grid-forming and grid- following inverters: A duality theory,”IEEE Transactions on Power Systems, vol. 37, no. 6, pp. 4541–4554, 2022

    2022

  35. [35]

    Available: https://github.com/Future-Power-Networks/ Publications/blob/main/BandwidthSeperation

    [Online]. Available: https://github.com/Future-Power-Networks/ Publications/blob/main/BandwidthSeperation