arxiv: 2605.13089 · v1 · submitted 2026-05-13 · ❄️ cond-mat.mtrl-sci

Recognition: unknown

Apparent Ferroelectric Polarization Hysteresis and a Simple Method to Observe Piezoelectric Strain Loops with a Microphone

Mamoru Fukunaga

Authors on Pith no claims yet

Pith reviewed 2026-05-14 17:50 UTC · model grok-4.3

classification ❄️ cond-mat.mtrl-sci

keywords ferroelectric hysteresisD-E loopsS-E loopsdouble-wave methodpiezoelectric strainmeasurement artifactselectret microphoneceramic capacitors

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The pith

Extra series components can create apparent ferroelectric D-E hysteresis loops even with the double-wave method.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper shows that non-ferroelectric capacitors combined with additional series circuit elements produce fake D-E hysteresis loops that mimic ferroelectric behavior, even under the double-wave method meant to suppress such effects. Simple circuit models illustrate how these artifacts form, and the work identifies similar suspicious loops in some published reports. Because true ferroelectricity involves reversible piezoelectric strain that tracks the field, the authors develop a low-cost method using an electret microphone to record S-E strain loops directly from bulk samples. When applied to a commercial ceramic capacitor, the strain loops indicate that the observed D-E hysteresis was only apparent. This distinction matters for confirming whether materials truly switch polarization or merely reflect measurement setup issues.

Core claim

Extra components in series to non-ferroelectric capacitance produce apparent ferroelectric D-E hysteresis loops even with the double-wave method. Characteristics of these fake loops are studied with simple circuit models, and similar suspicious loops appear in published papers that used the double-wave method. Inverse piezoelectric strain reverses along with polarization under the electric field, so S-E loops are more reliable for proving ferroelectricity than D-E loops. A simple circuit extension using an inexpensive small electret microphone allows observation of S-E loops on bulk samples, and measurements on a commercial ceramic capacitor reveal that its D-E loops were apparent rather.

What carries the argument

Simple circuit models that simulate series capacitive artifacts together with an electret microphone that detects the sample's inverse piezoelectric strain.

If this is right

D-E loops obtained by the double-wave method must be cross-checked against strain data to exclude circuit artifacts.
S-E loops supply a more direct test of ferroelectricity because they track the physical reversal of strain.
The microphone technique makes S-E measurements accessible without costly displacement sensors or interferometers.
Materials whose ferroelectric claims rest solely on D-E data from the double-wave method may need re-evaluation.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

Routine addition of low-cost strain detection could reduce false positives in ferroelectricity reports across materials labs.
The method offers a practical way to revisit older D-E data sets that lack accompanying strain measurements.
Frequency-dependent tests with the same microphone setup could expose whether apparent loops arise from relaxation effects.

Load-bearing premise

The circuit models capture the dominant real-world artifacts and the microphone records only the sample's strain response without adding its own electrical or mechanical distortions.

What would settle it

Applying the microphone method to the commercial ceramic capacitor and finding no S-E hysteresis while its D-E loop still shows one, or reproducing the apparent D-E loops only when known series capacitors are deliberately added in a controlled test.

Figures

Figures reproduced from arXiv: 2605.13089 by Mamoru Fukunaga.

**Figure 1.** Figure 1: A circuit for measuring D–E and S –E loops. VM = 3.3 V, RM = 1 kΩ, CM = 100 nF. Vise EM Vise Contacts Samples Rubber ring Air layer Base (a) Sample Capacitor plates Vise EM Vise Base Guard Seal (b) [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗

**Figure 2.** Figure 2: (Color online) A cross section of a setup for measuring [PITH_FULL_IMAGE:figures/full_fig_p002_2.png] view at source ↗

**Figure 4.** Figure 4: (Color online) (a) An I–V curve of the pair of diodes. (b) Continous D–E loops of capacitors with the diodes. (c) DWM D– E loops of the capacitor and diodes. (d) DWM D–E loops of the capacitors with diodes, or a breakable capacitor in series. xE means that D–E loops are drawn as proportional raw Q–V loops. As representative values of D in Sec loops, Dm and Pz are defined as shown in the figure. D = Dm at t… view at source ↗

**Figure 6.** Figure 6: (Color online) D–E loops of a capacitor with a series resistor. (a) By continuous triangular waves with various frequencies. (b) By the DWM at 5 Hz with the interval of 150 ms. (c) Sec loops the same as shown in (b) with various amplitudes. (d) Enlarged Diff loops shown in (b). decrease as frequency increases, these loops are considered to be horizontally inflated like the loops with diodes shown in [PI… view at source ↗

**Figure 8.** Figure 8: (Color online) S –E loops by an EM with triangular waves at 20 Hz. Broken curves are D–E loops measured with the same condition, though their vertical scales are omitted. (a) PZT. (b) MLCC. creases rapidly from VL = Vs to VL = Ve, and D changes like steps. The steps repeatedly appear as the voltage becomes higher. When the DWM is used, Sec loops are almost zero, and Diff loops and Pri loops are almost the … view at source ↗

**Figure 9.** Figure 9: (Color online) AC strain components of the PZT and [PITH_FULL_IMAGE:figures/full_fig_p005_9.png] view at source ↗

**Figure 10.** Figure 10: (Color online) (a) The relationship between the air layer [PITH_FULL_IMAGE:figures/full_fig_p005_10.png] view at source ↗

read the original abstract

Extra components in series to non-ferroelectric capacitance can cause apparent ferroelectric D-E hysteresis loops even with the double-wave method (DWM). Characteristics of fake loops are studied withsimple circuit models, and suspicious loops of actual materials are found in some papers using the DWM. Inverse piezoelectric strain also reverses along with the polarization by the electric field, and S-E loops are considered more reliable to prove ferroelectricity than the D-E loops. But measurement of S-E loops usually requires expensive instruments in contrast to D-E loops with a simple circuit. A very simple method is developed to observe S-E loops of bulk samples with an inexpensive small electret microphone and a little expansion to the circuit for D-E loops. S-E loops of a commercial ceramic capacitor by this method reveal that its D-E loops apparent.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Desk Editor's Note private letter to a colleague

Series capacitance can fake D-E loops even under DWM, and the cheap microphone S-E method is a practical addition, but the models and validation stay illustrative rather than quantitative.

read the letter

The main thing to know is that extra series capacitance can produce fake ferroelectric D-E hysteresis even when the double-wave method is used, and the authors give a low-cost way to check actual strain response with an electret microphone on bulk samples. The circuit models illustrate how the artifact forms, and they point to published loops that look suspicious under this lens. Their demonstration on a commercial ceramic capacitor shows an apparent D-E loop that does not match real strain reversal, which supports the warning in a concrete way. The microphone extension is the clearest new practical element: it adds minimal hardware to a standard D-E setup and avoids the need for expensive displacement sensors. This could be useful for labs that want a quick cross-check without big equipment. The models are simple and static, which makes the mechanism easy to follow but leaves out frequency-dependent losses, contact resistance, and probe effects that often matter in real setups. There is no quantitative overlay of model output against the specific literature examples, and the microphone path itself gets no calibration data or checks for acoustic artifacts or electromagnetic pickup. The work stays clear on its own terms and targets experimentalists who do ferroelectric characterization with limited resources. A reader focused on measurement reliability would find the artifact warning and the cheap S-E option worth seeing. It is solid enough to go to referees for a proper look, even if more validation data would help.

Referee Report

3 major / 1 minor

Summary. The manuscript claims that extra series capacitance connected to non-ferroelectric samples can produce apparent ferroelectric D-E hysteresis loops even when the double-wave method (DWM) is employed. This is supported by simple circuit models that generate fake loops, identification of suspicious loops in some published papers, and a proposed low-cost technique using an electret microphone to measure inverse piezoelectric S-E strain loops, demonstrated on a commercial ceramic capacitor whose D-E loops are shown to be artifacts.

Significance. If the central claims hold after validation, the work is significant for materials science because it identifies a plausible source of measurement artifacts in ferroelectric characterization and provides an accessible, inexpensive method to observe S-E loops. This could reduce false-positive ferroelectric claims and lower barriers to verifying piezoelectric response.

major comments (3)

[Abstract / Circuit models] Abstract and circuit-model section: the manuscript states that suspicious loops appear in some DWM papers but supplies no specific citations, no quantitative error analysis, and no direct overlays comparing modeled fake-loop shapes and magnitudes to the cited experimental data.
[Microphone method] Microphone-method description: the S-E measurement is presented without characterization of the electret microphone’s frequency response, mechanical coupling, or possible electromagnetic pickup, so it is unclear whether the reported loops are free of additional phase or amplitude artifacts.
[Results / Demonstration] Demonstration on commercial capacitor: the claim that the capacitor’s D-E loops are apparent rests on a single example without full experimental parameters, comparison to standard S-E instruments, or statistical assessment of loop reproducibility.

minor comments (1)

[Abstract] The abstract would benefit from explicit references to the specific papers whose D-E loops are flagged as suspicious.

Simulated Author's Rebuttal

3 responses · 0 unresolved

We thank the referee for the constructive feedback on our manuscript. We have addressed each major comment below and will incorporate revisions to strengthen the presentation of our circuit models, the microphone method, and the experimental demonstration.

read point-by-point responses

Referee: Abstract / Circuit models: the manuscript states that suspicious loops appear in some DWM papers but supplies no specific citations, no quantitative error analysis, and no direct overlays comparing modeled fake-loop shapes and magnitudes to the cited experimental data.

Authors: We agree that explicit citations and quantitative comparisons would improve clarity. In the revised manuscript we will add specific references to published DWM studies containing loops with the characteristic features of our modeled artifacts, include a quantitative error analysis of the series-capacitance effect, and provide direct overlay figures comparing the simulated fake loops to the experimental data from those papers. revision: yes
Referee: Microphone-method description: the S-E measurement is presented without characterization of the electret microphone’s frequency response, mechanical coupling, or possible electromagnetic pickup, so it is unclear whether the reported loops are free of additional phase or amplitude artifacts.

Authors: The referee correctly identifies the need for additional characterization. We will expand the methods section to report the measured frequency response of the electret microphone, describe the mechanical mounting and coupling to the sample, and include tests for electromagnetic pickup (e.g., shielded vs. unshielded runs and phase checks). These additions will confirm that the observed S-E loops are not dominated by instrumental artifacts. revision: yes
Referee: Results / Demonstration: the claim that the capacitor’s D-E loops are apparent rests on a single example without full experimental parameters, comparison to standard S-E instruments, or statistical assessment of loop reproducibility.

Authors: We acknowledge that a single demonstration limits robustness. The revised manuscript will supply the complete set of experimental parameters (voltage amplitude, frequency, sample dimensions, microphone gain settings), add a direct comparison of the microphone-derived S-E loops against measurements obtained with a commercial laser vibrometer on the same capacitor, and include repeated measurements on multiple devices with statistical metrics (standard deviation of loop area and coercive field) to demonstrate reproducibility. revision: yes

Circularity Check

0 steps flagged

No circularity; models and method are independent

full rationale

The paper constructs its central claims from explicit linear circuit models (series capacitance added to a non-ferroelectric capacitor) whose equations are written out and solved directly, plus a hardware description of an electret-microphone extension to a standard D-E circuit. These elements are derived from basic circuit theory and a commercial-capacitor test; no parameter is fitted to the suspicious literature loops, no self-citation supplies a uniqueness theorem, and no quantity is renamed as a prediction. The derivation chain therefore remains self-contained against external benchmarks.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

Only abstract available; no explicit free parameters, axioms, or invented entities are stated. The work relies on standard circuit theory and the assumption that microphone output faithfully tracks mechanical strain.

axioms (1)

domain assumption Simple lumped-element circuit models suffice to represent dominant measurement artifacts in real D-E setups
Invoked to explain apparent loops without full experimental validation details

pith-pipeline@v0.9.0 · 5439 in / 1134 out tokens · 27744 ms · 2026-05-14T17:50:32.452790+00:00 · methodology

discussion (0)

Reference graph

Works this paper leans on

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[1]

Apparent Ferroelectric Polarization Hysteresis and a Simple Method to Observe Piezoelectric Strain Loops with a Microphone

Introduction Ferroelectrics are materials which have the macro- scopic polarization P at the external electric field E = 0 and the remanent polarization Pr can be inverted by the E. Ferroelectricity is characterized by P–E or D– E hysteresis loops with P or the electric flux density D = P + ϵ0E. Principles of D–E loop measurement are not changed from a tr...

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[2]

Output of an EM proportional to the pressure change and S is measured as a charge through a capacitor CM, and a pair of two switches is used to choose D and S signals

Experiments Figure 1 shows a circuit for measuring D–E and S – E loops. Output of an EM proportional to the pressure change and S is measured as a charge through a capacitor CM, and a pair of two switches is used to choose D and S signals. (Although C0 is also changed for D or S , its switch is omitted in the figure.) I–V curves are also mea- sured instea...
[3]

Single” in the figure. The reason is unknown, and S –E loops later are measured by continu- ous triangular waves as “Cont

Results and discussion 3.1 DWM D–E loops of a PZT and an MLCC At first, Fig. 3(a) shows true ferroelectric D–E loops of a PZT sample by the DWM. In the figures, although y is area and x is thickness for a plate-like sample, yD and 2 J. Phys. Soc. Jpn. FULL PAPERS -2 -1 0 1 2 -1 0 1 f e d c ba Di/C-C Di-C xE / V yD / µC -1 0 1 Pri, Sec Diffd c b a yD / µC ...
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Fake D–E loops can be made with various circuit models, and it is recommended that users of the DWM try

Conclusions It is demonstrated that apparent ferroelectric D–E hys- teresis loops can appear even with the DWM. Fake D–E loops can be made with various circuit models, and it is recommended that users of the DWM try. Characteris- tics of the apparent loops appear in not only Diff loops but also Sec loops, and Sec loops by the DWM should be shown. Apparent...
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