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arxiv: 2606.10856 · v1 · pith:32VQCWM4new · submitted 2026-06-09 · 💻 cs.RO

An Exposure-Time-Aligned Primary-Path Architecture for Autonomous-Driving ECUs

Toru Saito , Yuki Hagura , Tatsuya Konishi , Satoru Mizusawa , Takumi Yajima This is my paper

Pith reviewed 2026-06-27 12:55 UTC · model grok-4.3

classification 💻 cs.RO
keywords autonomous drivingECU architecturemodular pipelineend-to-end learningexposure time alignmentprimary pathshadow modelatency budget
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The pith

Primary-path architecture with exposure-time alignment lets modular and end-to-end autonomous-driving paths coexist on production ECUs.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper claims that production autonomous-driving ECUs can run a modular perception pipeline as the main path while an end-to-end path operates in parallel as a shadow. It achieves this by designating one primary perception chain inside a single SoC pair, tagging sensor data with its exposure time, and triggering fusion only when exposure times match rather than on a fixed schedule. The resulting system measures a mean camera-shutter to planner-output latency of 296 ms on real dual-SoC hardware, staying inside the 350 ms design limit. If the claim holds, vehicles can keep the modular pipeline in charge at launch and gradually enlarge the end-to-end portion as evidence is collected, without swapping the entire computing platform.

Core claim

By selecting a primary perception chain on one SoC pair, propagating the primary sensor exposure time as a tag, and event-driving fusion on matched exposure times, the architecture supports a modular pipeline as primary while an end-to-end path runs as shadow inside the same exposure cycle, closing the end-to-end latency to a measured mean of 296 ms within the 350 ms budget on a production dual-SoC AD-ECU.

What carries the argument

The Exposure-Time-Aligned Primary-Path with Co-Path Coexistence, which prioritizes one perception chain, carries exposure-time tags for event-driven fusion, and permits an end-to-end output to share the identical exposure cycle.

If this is right

  • The modular pipeline remains the primary path at the moment of production launch.
  • The end-to-end path runs in shadow on real vehicles and can be expanded only as evaluation data accumulates.
  • Both paths operate inside the same exposure-time cycle without requiring separate hardware.
  • The measured mean latency of 296 ms stays inside the 350 ms design budget on existing dual-SoC ECUs.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • If the exposure-time tag can be attached to other sensor types, the same alignment principle could extend the architecture beyond cameras.
  • Staged replacement of individual modules by end-to-end components becomes possible without a full ECU redesign.
  • The design may lower the barrier to testing end-to-end methods on fleets that must retain a certified modular safety case.

Load-bearing premise

That the primary modular chain will continue to deliver correct and safe outputs when the end-to-end path is added as shadow inside the same exposure cycle without creating unhandled timing or priority conflicts.

What would settle it

A production-vehicle test in which expanding the end-to-end path past shadow mode causes either measured latency above 350 ms or a detected safety violation traceable to timing mismatch between the two paths.

Figures

Figures reproduced from arXiv: 2606.10856 by Satoru Mizusawa, Takumi Yajima, Tatsuya Konishi, Toru Saito, Yuki Hagura.

Figure 1
Figure 1. Figure 1: Hardware layout of the target production AD-ECU (Dual-SoC pair). [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Signal flow of the target production AD-ECU. Purple = sensors, yellow = perception domain (SoC 0, BEV-space), orange = env-model domain, green [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: Architecture comparison. Top — Conventional Fusion (Before): under egalitarian peer placement the ViT Perception chain and the PV-based auxiliary perception are co-located on SoC 0; EM-TimeSync waits at a fixed cycle (Cyc), the SoC 0 CPU is saturated, and the NNPlanner is pushed to SoC 1, so “fusion → planning” crosses the SoC boundary. Bottom — Proposed (After): the ViT Perception chain is designated as t… view at source ↗
Figure 4
Figure 4. Figure 4: Trace gantt over 500 ms on the production AD-ECU. [PITH_FULL_IMAGE:figures/full_fig_p006_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: Camera-shutter to NNPLANNER-done latency distribution under the [PITH_FULL_IMAGE:figures/full_fig_p006_5.png] view at source ↗
read the original abstract

While end-to-end (E2E) autonomous driving has become the dominant research direction, production vehicles continue to rely on modular multi-NN pipelines for a non-trivial transitional period. The subject of this paper is the design of an architecture that, during this phase, supports a modular pipeline and an E2E path side by side and embeds a path for staged migration. Transplanted to a production SoC, egalitarian late fusion is compute-inefficient and offers no natural unit for staged E2E substitution. As an alternative, we propose three design principles: (i) Primary-Path, which explicitly selects a primary perception chain and prioritizes its enclosure within a single SoC pair over the non-critical paths (ii) Exposure-Time-Aligned, which propagates the primary sensor's exposure time $\tau_{\rm exp}$ as a tag along the chain and event-drives the fusion node on matched $\tau_{\rm exp}$ rather than a fixed cycle and (iii) Co-Path Coexistence, which, building on (i) and (ii), lets an E2E output path co-run with the modular pipeline within the same $\tau_{\rm exp}$ cycle. On a Dual-SoC production AD-ECU, the implementation closes camera-shutter to planner-output latency at a mean of 296 ms within the 350 ms design budget. Under (iii), the modular pipeline is primary at production launch and the E2E path runs as shadow on real vehicles, and the E2E scope is expanded as evaluation evidence accumulates.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 0 minor

Summary. The manuscript proposes an architecture for autonomous-driving ECUs supporting both modular multi-NN pipelines and end-to-end (E2E) paths during the transitional period. It defines three principles: (i) Primary-Path, which selects and encloses one perception chain within a single SoC pair; (ii) Exposure-Time-Aligned, which propagates the primary sensor's exposure time au_exp as a tag for event-driven fusion; and (iii) Co-Path Coexistence, which permits an E2E output to co-run with the modular pipeline in the same au_exp cycle. The central empirical result is an implementation on a Dual-SoC production AD-ECU that achieves a mean camera-shutter to planner-output latency of 296 ms (within the 350 ms budget), with the modular path as primary and the E2E path running as shadow.

Significance. If the performance claim holds under production conditions, the work supplies a concrete, deployable design for staged migration from modular to E2E systems on real hardware. The explicit latency number obtained on a production Dual-SoC ECU is a strength, as is the focus on exposure-time alignment as a natural synchronization primitive.

major comments (2)
  1. [Abstract] Abstract: the central claim that the implementation closes shutter-to-planner latency at a mean of 296 ms within the 350 ms budget is presented without any description of measurement methodology, variance, trial count, or validation against edge cases or varying E2E load. This information is load-bearing for the assertion that principle (iii) preserves the budget in production.
  2. [Abstract] Description of Co-Path Coexistence (principle (iii)): the architecture selects a primary chain inside one SoC pair and uses exposure-time tags, yet supplies no quantitative isolation mechanism (core partitioning, memory-bandwidth reservation, or priority inheritance) and no ablation of primary-path latency as E2E compute load varies from zero to maximum. Without such data, scheduler or cache contention on the shared SoC pair could push tail latency above 350 ms even if the reported mean remains 296 ms.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive feedback and the recognition of the work's potential for staged migration on production hardware. We address each major comment below.

read point-by-point responses

  1. Referee: [Abstract] Abstract: the central claim that the implementation closes shutter-to-planner latency at a mean of 296 ms within the 350 ms budget is presented without any description of measurement methodology, variance, trial count, or validation against edge cases or varying E2E load. This information is load-bearing for the assertion that principle (iii) preserves the budget in production.

    Authors: We agree the abstract would be strengthened by including a brief description of the measurement approach. The full manuscript details the methodology, trial counts, and validation in the Experiments section. We will revise the abstract to concisely note the methodology (timestamped ECU logs), trial count, and variance while preserving the central claim. revision: yes

  2. Referee: [Abstract] Description of Co-Path Coexistence (principle (iii)): the architecture selects a primary chain inside one SoC pair and uses exposure-time tags, yet supplies no quantitative isolation mechanism (core partitioning, memory-bandwidth reservation, or priority inheritance) and no ablation of primary-path latency as E2E compute load varies from zero to maximum. Without such data, scheduler or cache contention on the shared SoC pair could push tail latency above 350 ms even if the reported mean remains 296 ms.

    Authors: The Primary-Path principle provides isolation by enclosing the critical chain in a dedicated SoC pair, leveraging the production hardware's core affinity and memory partitioning (detailed in Section 4). We acknowledge the absence of an explicit ablation on E2E load variation and will add such results in the revision to quantify primary-path latency stability under increasing E2E compute. revision: yes

Circularity Check

0 steps flagged

No circularity; latency claim is direct implementation measurement

full rationale

The paper defines three design principles (Primary-Path, Exposure-Time-Aligned, Co-Path Coexistence) and reports an empirical result: mean shutter-to-planner latency of 296 ms on a Dual-SoC production AD-ECU. No equations, fitted parameters, or self-citations appear in the provided text. The central claim is a measured performance outcome under the stated architecture, not a derived prediction that reduces to its own inputs by construction. The derivation chain is therefore self-contained as an engineering implementation report.

Axiom & Free-Parameter Ledger

0 free parameters · 2 axioms · 0 invented entities

The paper rests on domain assumptions about the transitional period in production vehicles and the inefficiency of egalitarian late fusion; no free parameters or new invented entities are introduced.

axioms (2)
  • domain assumption Production vehicles will continue to rely on modular multi-NN pipelines for a non-trivial transitional period.
    Explicitly stated as background in the abstract opening sentence.
  • domain assumption Egalitarian late fusion is compute-inefficient and offers no natural unit for staged E2E substitution.
    Presented as motivation for the proposed alternative architecture.

pith-pipeline@v0.9.1-grok · 5826 in / 1309 out tokens · 18424 ms · 2026-06-27T12:55:09.977545+00:00 · methodology

discussion (0)

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