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arxiv: 2606.31833 · v1 · pith:O7XMHCY3new · submitted 2026-06-30 · 🪐 quant-ph · cs.AR

Lazy-Move Compilation for Neutral-Atom Quantum Computers via a Buffer-Relay Fabric

Chen Huang , Jingbo Wang , Zhemin Zhang , Ming Zhong , Zhuo Fu , Zhiding Liang , Yuan Sun , Dong E. Liu This is my paper

Pith reviewed 2026-07-01 05:18 UTC · model grok-4.3

classification 🪐 quant-ph cs.AR
keywords neutral-atom quantum computingquantum circuit compilationbuffer-relay interconnectlazy-move schedulingRydberg-mediated gatesdual-species atom arraysdata-stable executionquantum fidelity benchmarks
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The pith

A static buffer-relay fabric in dual-species atom arrays enables data-stable execution with zero data-atom movement for neutral-atom quantum circuits.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper introduces BRIDGE, a co-designed static buffer-relay interconnect and lazy-move compiler for neutral-atom platforms that avoids most physical shuttling of data atoms. It uses non-encoding buffer atoms in a dual-species 2D interleaved array to mediate interactions via calibrated Rydberg channels while suppressing unwanted data-data crosstalk. The method targets hotspots with limited motion only, creating a fixed routing backbone managed by the compiler. If the approach holds, circuits run with far fewer transport events, which directly reduces handoff errors, heating, and atom loss. The central result is a geometric-mean fidelity gain of roughly tenfold over ZAP and sixteenfold over Enola on a matched 22-circuit suite, paired with execution-time reductions of hundreds of times.

Core claim

BRIDGE co-designs a static, compiler-managed buffer-relay fabric with a lazy-move compiler on an optimized dual-species 2D interleaved atom array; non-encoding buffer atoms mediate long-range interactions through heteronuclear and homonuclear Rydberg channels, enabling data-buffer and buffer-buffer couplings while residual data-data crosstalk is suppressed, so that data atoms remain in place except at selected hotspots.

What carries the argument

The Buffer-Relay Interconnect for Data-stable Gate Execution (BRIDGE), which builds a static routing backbone from buffer atoms in a dual-species array to allow compiler-directed lazy moves instead of full shuttling.

If this is right

  • Data-atom transport events drop from thousands to zero across the benchmark suite.
  • Geometric-mean total fidelity rises by a factor of approximately 10 relative to ZAP and 16 relative to Enola.
  • Circuit execution time falls by factors of roughly 540 relative to ZAP and 1000 relative to Enola.
  • The static backbone permits the compiler to schedule most gates without physical atom movement.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same static-fabric idea could reduce hardware demands for atom-transport actuators in larger arrays.
  • Limited data motion at hotspots might combine with existing error-correction codes to further extend coherence.
  • If the dual-species calibration generalizes, similar buffer-relay layers could appear in other shuttling-based qubit technologies.
  • Compiler passes that assume a fixed backbone may become standard once the crosstalk suppression is demonstrated at scale.

Load-bearing premise

A dual-species 2D interleaved atom array with calibrated heteronuclear and homonuclear Rydberg channels can form a static routing backbone that enables data-buffer interactions while suppressing data-data crosstalk.

What would settle it

An experiment on a physical dual-species array showing that data-data crosstalk cannot be suppressed enough to maintain the claimed fidelity advantage while still enabling buffer-mediated gates, or benchmark runs under the shared error model that fail to reproduce the reported geometric-mean gains.

Figures

Figures reproduced from arXiv: 2606.31833 by Chen Huang, Dong E. Liu, Jingbo Wang, Ming Zhong, Yuan Sun, Zhemin Zhang, Zhiding Liang, Zhuo Fu.

Figure 1
Figure 1. Figure 1: Quality–cost trade-off on the 22-circuit matched suite [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Rydberg blockade and native CZ gate. (a) For atoms [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: BAM relay mechanism. (a) A native CZ needs both [PITH_FULL_IMAGE:figures/full_fig_p004_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: Staggered dual-species geometric arrangement used by [PITH_FULL_IMAGE:figures/full_fig_p005_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: BRIDGE compiler workflow in four stages. (a) The Front-End decomposes the circuit to the native gate set and extracts [PITH_FULL_IMAGE:figures/full_fig_p006_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: Temporal locality and circuit phase shifts. (a) Under [PITH_FULL_IMAGE:figures/full_fig_p008_6.png] view at source ↗
Figure 7
Figure 7. Figure 7: BRIDGE-F fixed-baseline fidelity profile ( [PITH_FULL_IMAGE:figures/full_fig_p011_7.png] view at source ↗
Figure 9
Figure 9. Figure 9: shows sharp diminishing returns. Mean execution time drops from 826 µs at K = 0 to 691 at K = 64 and 603 at K = 128, then saturates at 518 µs for K ≥ 256—a 0 1 4 16 64 256 1024 Mobility budget 550 600 650 700 750 800 Mean exec. time (µs) Exec. time Realized moves 0 5 10 15 20 25 30 Mean realized moves [PITH_FULL_IMAGE:figures/full_fig_p012_9.png] view at source ↗
Figure 8
Figure 8. Figure 8: Joint sweep of move budget K and aggressiveness τ on one movement-responsive circuit, qft_n18 (relay￾dominated, exercising the move-amortization mechanism of [PITH_FULL_IMAGE:figures/full_fig_p012_8.png] view at source ↗
Figure 10
Figure 10. Figure 10: Per-circuit comparison of BRIDGE-F against ZAP and Enola on the matched RQ4 suite, all re-estimated under the [PITH_FULL_IMAGE:figures/full_fig_p013_10.png] view at source ↗
Figure 11
Figure 11. Figure 11: Total atom movement over the RQ4 suite. BRIDGE [PITH_FULL_IMAGE:figures/full_fig_p013_11.png] view at source ↗
Figure 12
Figure 12. Figure 12: Bounded relay-concurrency sweep across scalable RQ5 workloads, re-scheduled offline at a cap of [PITH_FULL_IMAGE:figures/full_fig_p014_12.png] view at source ↗
Figure 13
Figure 13. Figure 13: Depth and temporal-locality scaling: execution time [PITH_FULL_IMAGE:figures/full_fig_p014_13.png] view at source ↗
Figure 15
Figure 15. Figure 15: Static-Naive vs BRIDGE-F over the external suite [PITH_FULL_IMAGE:figures/full_fig_p015_15.png] view at source ↗
Figure 17
Figure 17. Figure 17: Placement attribution, per benchmark: mobility-aware [PITH_FULL_IMAGE:figures/full_fig_p016_17.png] view at source ↗
read the original abstract

Neutral atom quantum computing offers strong scalability and flexible qubit connectivity, but most existing compilation flows rely on reconfigurable atom arrays that physically shuttle qubit atoms during execution. Although this approach improves connectivity, it also introduces handoff errors, motional heating, and atom-loss risks that can degrade overall fidelity. We present BRIDGE, a Buffer-Relay Interconnect for Data-stable Gate Execution that co-designs a static, compiler-managed buffer-relay fabric with a lazy-move compiler that exploits it. BRIDGE targets an optimized, dual-species 2D interleaved atom array, using non-encoding ``buffer atoms'' to mediate long-range interactions in the fixed baseline and introducing limited data motion only for selected hotspots. By using calibrated heteronuclear and homonuclear Rydberg channels, BRIDGE realizes a static routing backbone in which data-buffer and buffer-buffer interactions are enabled while residual data-data crosstalk is suppressed. Across a 22-circuit matched benchmark suite re-estimated under a single shared error model, BRIDGE attains a geometric-mean $\sim$10$\times$ higher total fidelity than ZAP and $\sim$16$\times$ than Enola, together with $\sim$540$\times$ and $\sim$1000$\times$ lower circuit execution time, respectively, while reducing data-atom movement from thousands of transport events to zero.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The paper introduces BRIDGE, a Buffer-Relay Interconnect for Data-stable Gate Execution, that co-designs a static buffer-relay fabric in a dual-species 2D interleaved neutral-atom array with a lazy-move compiler. It claims that, under a single shared error model, BRIDGE delivers geometric-mean ~10× higher total fidelity than ZAP and ~16× higher than Enola across a 22-circuit benchmark suite, together with ~540× and ~1000× lower execution time, while eliminating data-atom transport events.

Significance. If the underlying error model and crosstalk assumptions hold, the result would be significant for neutral-atom quantum computing: it offers a concrete route to avoid movement-induced errors (handoff, heating, loss) that currently limit fidelity in reconfigurable arrays, while preserving flexible connectivity through a compiler-managed static backbone.

major comments (2)
  1. [Abstract / hardware assumptions] Abstract and hardware-description section: the ~10×/~16× fidelity and zero-movement claims are obtained by re-estimating all 22 circuits under a shared error model that presupposes a static routing backbone; the manuscript supplies neither measured nor calculated interaction matrices (e.g., heteronuclear vs. homonuclear C6 coefficients at the relevant lattice vectors) nor an explicit bound showing residual data-data crosstalk remains below the per-gate error budget used in the fidelity calculation.
  2. [Benchmark evaluation] Benchmark and error-model section: because the performance numbers rest on a single shared error model whose parameters, assumptions, and validation against device data are not reported, it is impossible to determine whether the reported fidelity and runtime gains are robust or are artifacts of the model’s selectivity assumptions.
minor comments (2)
  1. [Introduction] Notation for “buffer atoms” and “data atoms” should be introduced with a short table or diagram in the first section that defines their roles and species assignment.
  2. [Evaluation] The 22-circuit suite is described only as “matched”; a brief table listing circuit names, qubit counts, and gate depths would improve reproducibility.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive comments on the hardware assumptions and error-model transparency. We address both points below and will incorporate the requested details in the revised manuscript.

read point-by-point responses

  1. Referee: [Abstract / hardware assumptions] Abstract and hardware-description section: the ~10×/~16× fidelity and zero-movement claims are obtained by re-estimating all 22 circuits under a shared error model that presupposes a static routing backbone; the manuscript supplies neither measured nor calculated interaction matrices (e.g., heteronuclear vs. homonuclear C6 coefficients at the relevant lattice vectors) nor an explicit bound showing residual data-data crosstalk remains below the per-gate error budget used in the fidelity calculation.

    Authors: The manuscript states that BRIDGE relies on calibrated heteronuclear and homonuclear Rydberg channels to realize the static backbone while suppressing data-data crosstalk. We agree that explicit interaction matrices and a quantitative crosstalk bound are not included in the current version. In the revision we will add an appendix containing the calculated C6 coefficients for the relevant lattice vectors together with an explicit upper bound on residual data-data crosstalk relative to the per-gate error budget used in the fidelity estimates. revision: yes

  2. Referee: [Benchmark evaluation] Benchmark and error-model section: because the performance numbers rest on a single shared error model whose parameters, assumptions, and validation against device data are not reported, it is impossible to determine whether the reported fidelity and runtime gains are robust or are artifacts of the model’s selectivity assumptions.

    Authors: The benchmark section re-estimates all 22 circuits under one shared error model, but we acknowledge that the full parameter list, modeling assumptions, and any literature-based validation are not presented in sufficient detail. In the revision we will expand the error-model section to enumerate every parameter and assumption and to cite the device-calibration references used to set those values, thereby allowing readers to assess robustness directly. revision: yes

Circularity Check

0 steps flagged

No significant circularity; claims rest on external benchmarks

full rationale

The paper presents BRIDGE as a co-designed architecture and compiler, with central claims consisting of geometric-mean fidelity and runtime improvements measured on a 22-circuit benchmark suite re-evaluated under one shared error model. No equations, derivations, or fitted parameters are shown to reduce to the authors' own inputs by construction. The error model incorporates hardware assumptions (dual-species interleaved array, heteronuclear/homonuclear Rydberg selectivity), but these are stated as design premises rather than derived results; the performance numbers are obtained by direct comparison against external compilers (ZAP, Enola) and are therefore falsifiable outside the paper. No self-citation chains, ansatzes smuggled via prior work, or renaming of known results appear as load-bearing steps. This is the normal case of a self-contained empirical comparison.

Axiom & Free-Parameter Ledger

1 free parameters · 1 axioms · 1 invented entities

The central claim rests on the domain assumption that crosstalk can be suppressed in a static dual-species array via calibrated Rydberg channels and on an unspecified shared error model whose parameters are not derived from first principles.

free parameters (1)
  • shared error model parameters
    All fidelity and runtime numbers are obtained by re-estimating benchmarks under one shared error model whose concrete rates and assumptions are not stated.
axioms (1)
  • domain assumption A dual-species 2D interleaved atom array can be realized such that heteronuclear and homonuclear Rydberg channels enable data-buffer and buffer-buffer interactions while suppressing data-data crosstalk.
    This premise is required for the static routing backbone to function without data motion.
invented entities (1)
  • buffer atoms no independent evidence
    purpose: Non-encoding mediator atoms that enable long-range interactions in the fixed array.
    Introduced as a new architectural element to avoid data-atom transport.

pith-pipeline@v0.9.1-grok · 5785 in / 1484 out tokens · 38545 ms · 2026-07-01T05:18:20.948197+00:00 · methodology

discussion (0)

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Reference graph

Works this paper leans on

36 extracted references

  1. [1]

    Quantum computing with neutral atoms,

    L. Henriet, L. Beguin, A. Signoles, T. Lahaye, A. Browaeys, G.-O. Reymond, and C. Jurczak, “Quantum computing with neutral atoms,” vol. 4, p. 327

  2. [2]

    Quantum information with rydberg atoms,

    M. Saffman, T. G. Walker, and K. Mølmer, “Quantum information with rydberg atoms,” vol. 82, no. 3, pp. 2313–2363

  3. [3]

    Superconducting circuits for quan- tum information: An outlook,

    M. H. Devoret and R. J. Schoelkopf, “Superconducting circuits for quan- tum information: An outlook,”Science, vol. 339, no. 6124, pp. 1169– 1174, 2013

    2013

  4. [4]

    An atom-by-atom assembler of defect-free arbitrary two-dimensional atomic arrays,

    D. Barredo, S. de L ´es´eleuc, V . Lienhard, T. Lahaye, and A. Browaeys, “An atom-by-atom assembler of defect-free arbitrary two-dimensional atomic arrays,”Science, vol. 354, no. 6315, pp. 1021–1023, 2016

    2016

  5. [5]

    Interspecies f ¨orster resonances for rb-cs rydbergd-states for enhanced multi-qubit gate fidelities,

    P. M. Ireland, D. M. Walker, and J. D. Pritchard, “Interspecies f ¨orster resonances for rb-cs rydbergd-states for enhanced multi-qubit gate fidelities,”Phys. Rev. Res., vol. 6, p. 013293, Mar 2024

    2024

  6. [6]

    Buffer-atom-mediated quantum logic gates with off-resonant modulated driving,

    Y . Sun, “Buffer-atom-mediated quantum logic gates with off-resonant modulated driving,” vol. 67, no. 12, p. 120311

  7. [7]

    Controlled phase gate protocol for neutral atoms via off-resonant modulated driving,

    Y . Sun, P. Xu, P.-X. Chen, and L. Liu, “Controlled phase gate protocol for neutral atoms via off-resonant modulated driving,”Physical Review Applied, vol. 13, p. 024059, feb 2020

    2020

  8. [8]

    High-fidelity entanglement of neutral atoms via a rydberg-mediated single-modulated-pulse controlled-phase gate,

    Z. Fu, P. Xu, Y . Sun, Y .-Y . Liu, X.-D. He, X. Li, M. Liu, R.-B. Li, J. Wang, L. Liu, and M.-S. Zhan, “High-fidelity entanglement of neutral atoms via a rydberg-mediated single-modulated-pulse controlled-phase gate,”Physical Review A, vol. 105, p. 042430, apr 2022

    2022

  9. [9]

    High-fidelity entangling gates and nonlocal circuits with neutral atoms,

    S. J. Evered, M. Xu, S. H. Li, A. A. Geim, J. P. B. Ataides, M. Kali- nowski, D. Bluvstein, N. Maskara, C. Kokail, M. Greiner, V . Vuleti ´c, and M. D. Lukin, “High-fidelity entangling gates and nonlocal circuits with neutral atoms,” apr 2026

    2026

  10. [10]

    A dual-species rydberg array,

    S. Anand, C. E. Bradley, R. White, V . Ramesh, K. Singh, and H. Bernien, “A dual-species rydberg array,”Nature Physics, vol. 20, pp. 1744–1750, sep 2024

    2024

  11. [11]

    Speed, retention loss, and motional heating of atoms in an optical conveyor belt,

    G. T. Hickman and M. Saffman, “Speed, retention loss, and motional heating of atoms in an optical conveyor belt,”Physical Review A, vol. 101, p. 063411, jun 2020

    2020

  12. [12]

    Optimal control transport of neutral atoms in optical tweezers at finite temperature,

    A. Pagano, D. Jaschke, W. Weiss, and S. Montangero, “Optimal control transport of neutral atoms in optical tweezers at finite temperature,” Physical Review Research, vol. 6, p. 033282, sep 2024

    2024

  13. [13]

    A quantum processor based on coherent transport of entangled atom arrays,

    D. Bluvstein, H. Levine, G. Semeghini, T. T. Wang, S. Ebadi, M. Kali- nowski, A. Keesling, N. Maskara, H. Pichler, M. Greiner, V . Vuleti ´c, and M. D. Lukin, “A quantum processor based on coherent transport of entangled atom arrays,”Nature, vol. 604, pp. 451–456, apr 2022

    2022

  14. [14]

    Coherent transport of atomic quantum states in a scalable shift register,

    A. Lengwenus, J. Kruse, M. Schlosser, S. Tichelmann, and G. Birkl, “Coherent transport of atomic quantum states in a scalable shift register,” Physical Review Letters, vol. 105, p. 170502, oct 2010

    2010

  15. [15]

    Qasmbench: A low- level quantum benchmark suite for nisq evaluation and simulation,

    A. Li, S. Stein, S. Krishnamoorthy, and J. Ang, “Qasmbench: A low- level quantum benchmark suite for nisq evaluation and simulation,”ACM Transactions on Quantum Computing, vol. 4, pp. 1–26, feb 2023

    2023

  16. [16]

    Veriqbench: A benchmark for multiple types of quantum circuits,

    K. Chen, W. Fang, J. Guan, X. Hong, M. Huang, J. Liu, Q. Wang, and M. Ying, “Veriqbench: A benchmark for multiple types of quantum circuits,” jun 2022

    2022

  17. [17]

    Dual- element, two-dimensional atom array with continuous-mode operation,

    K. Singh, S. Anand, A. Pocklington, J. T. Kemp, and H. Bernien, “Dual- element, two-dimensional atom array with continuous-mode operation,” Physical Review X, vol. 12, p. 011040, jan 2022

    2022

  18. [18]

    Consequences of zeeman degeneracy for the van der waals blockade between rydberg atoms,

    T. G. Walker and M. Saffman, “Consequences of zeeman degeneracy for the van der waals blockade between rydberg atoms,”Phys. Rev. A, vol. 77, p. 032723, Mar 2008

    2008

  19. [19]

    Rydberg-blockade controlled- not gate and entanglement in a two-dimensional array of neutral-atom qubits,

    K. M. Maller, M. T. Lichtman, T. Xia, Y . Sun, M. J. Piotrowicz, A. W. Carr, L. Isenhower, and M. Saffman, “Rydberg-blockade controlled- not gate and entanglement in a two-dimensional array of neutral-atom qubits,”Physical Review A, vol. 92, p. 022336, aug 2015

    2015

  20. [20]

    Parallel implementation of high-fidelity multiqubit gates with neutral atoms,

    H. Levine, A. Keesling, G. Semeghini, A. Omran, T. T. Wang, S. Ebadi, H. Bernien, M. Greiner, V . Vuleti´c, H. Pichler, and M. D. Lukin, “Parallel implementation of high-fidelity multiqubit gates with neutral atoms,” Physical Review Letters, vol. 123, p. 170503, oct 2019

    2019

  21. [21]

    Logical quantum processor based on reconfigurable atom arrays,

    D. Bluvstein, S. J. Evered, A. A. Geim, S. H. Li, H. Zhou, T. Manovitz, S. Ebadi, M. Cain, M. Kalinowski, D. Hangleiter, J. P. Bonilla Ataides, N. Maskara, I. Cong, X. Gao, P. Sales Rodriguez, T. Karolyshyn, G. Semeghini, M. J. Gullans, M. Greiner, V . Vuleti ´c, and M. D. Lukin, “Logical quantum processor based on reconfigurable atom arrays,” Nature, vol...

    2023

  22. [22]

    High-fidelity parallel entangling gates on a neutral-atom quantum computer,

    S. J. Evered, D. Bluvstein, M. Kalinowski, S. Ebadi, T. Manovitz, H. Zhou, S. H. Li, A. A. Geim, T. T. Wang, N. Maskara, H. Levine, G. Semeghini, M. Greiner, V . Vuleti´c, and M. D. Lukin, “High-fidelity parallel entangling gates on a neutral-atom quantum computer,”Nature, vol. 622, pp. 268–272, oct 2023

    2023

  23. [23]

    A tweezer array with 6,100 highly coherent atomic qubits,

    H. J. Manetsch, G. Nomura, E. Bataille, X. Lv, K. H. Leung, and M. Endres, “A tweezer array with 6,100 highly coherent atomic qubits,” Nature, vol. 647, pp. 60–67, sep 2025

    2025

  24. [24]

    Zap: Zoned architecture and performant compiler for field programmable atom array,

    C. Huang, X. Zhao, H. Xu, W. Zhuang, M.-J. Hu, D. E. Liu, and J. Wang, “Zap: Zoned architecture and performant compiler for field programmable atom array,”IEEE Transactions on Quantum Engineer- ing, vol. PP, pp. 1–19, may 2026

    2026

  25. [25]

    Compilation for dynamically field- programmable qubit arrays with efficient and provably near-optimal scheduling,

    D. B. Tan, W.-H. Lin, and J. Cong, “Compilation for dynamically field- programmable qubit arrays with efficient and provably near-optimal scheduling,” inProceedings of the 30th Asia and South Pacific De- sign Automation Conference, pp. 921–929, Association for Computing Machinery (ACM), jan 2025

    2025

  26. [26]

    Compiling quantum circuits for dynamically field-programmable neutral atoms array processors,

    D. B. Tan, M. Y . Niu, and J. Cong, “Compiling quantum circuits for dynamically field-programmable neutral atoms array processors,” Quantum, vol. 8, p. 1281, 2024

    2024

  27. [27]

    Atomique: A quantum compiler for reconfigurable neutral atom arrays,

    H. Wang, P. Liu, D. B. Tan, Y . Liu, J. Gu, D. Z. Pan, J. Cong, U. A. Acar, and S. Han, “Atomique: A quantum compiler for reconfigurable neutral atom arrays,” in2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA), pp. 293–309, Institute of Electrical and Electronics Engineers (IEEE), jun 2024

    2024

  28. [28]

    Parallax: A compiler for neutral atom quantum computers under hardware constraints,

    J. Ludmir and T. Patel, “Parallax: A compiler for neutral atom quantum computers under hardware constraints,” inSC24: International Con- ference for High Performance Computing, Networking, Storage and Analysis, pp. 1–17, Institute of Electrical and Electronics Engineers (IEEE), nov 2024

    2024

  29. [29]

    Reuse-aware compilation for zoned quantum architectures based on neutral atoms,

    W.-H. Lin, D. B. Tan, and J. Cong, “Reuse-aware compilation for zoned quantum architectures based on neutral atoms,” in2025 IEEE 17 International Symposium on High Performance Computer Architecture (HPCA), vol. 00, pp. 127–142, Institute of Electrical and Electronics Engineers (IEEE), mar 2025

    2025

  30. [30]

    Pow- ermove: Optimizing compilation for neutral atom quantum computers with zoned architecture,

    J. Ruan, X. Fang, H. Zhang, A. Li, T. Humble, and Y . Ding, “Pow- ermove: Optimizing compilation for neutral atom quantum computers with zoned architecture,” inProceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2025

    2025

  31. [31]

    Physics-aware compilation for parallel quantum circuit execution on neutral atom arrays,

    G. Chen, G. Yang, W. Sun, L. Yu, G. Deng, D. Zheng, and X. Li, “Physics-aware compilation for parallel quantum circuit execution on neutral atom arrays,” 2025

    2025

  32. [32]

    Q- pilot: Field programmable qubit array compilation with flying ancillas,

    H. Wang, D. B. Tan, P. Liu, Y . Liu, J. Gu, J. Cong, and S. Han, “Q- pilot: Field programmable qubit array compilation with flying ancillas,” inProceedings of the 61st ACM/IEEE Design Automation Conference, DAC ’24, (New York, NY , USA), Association for Computing Machinery, 2024

    2024

  33. [33]

    Two-qubit entangling gates between distant atomic qubits in a lattice,

    A. Cesa and J. Martin, “Two-qubit entangling gates between distant atomic qubits in a lattice,”Physical Review A, vol. 95, p. 052330, may 2017

    2017

  34. [34]

    Compiler framework for directional transport in zoned neutral atom systems with aod assistance: A hybrid remote cz approach,

    L. Kong, C. Huang, Z. Zhang, Y . Zhou, X. Ren, S. Li, and Z. Liang, “Compiler framework for directional transport in zoned neutral atom systems with aod assistance: A hybrid remote cz approach,” in2026 63rd ACM/IEEE Design Automation Conference (DAC), 2026

    2026

  35. [35]

    Tackling the qubit mapping problem for nisq-era quantum devices,

    G. Li, Y . Ding, and Y . Xie, “Tackling the qubit mapping problem for nisq-era quantum devices,” inProceedings of the 24th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pp. 1001–1014, 2019

    2019

  36. [36]

    t|ket⟩: A retargetable compiler for nisq devices,

    S. Sivarajah, S. Dilkes, A. Cowtan, W. Simmons, A. Edgington, and R. Duncan, “t|ket⟩: A retargetable compiler for nisq devices,”Quantum Science and Technology, vol. 6, no. 1, p. 014003, 2020. 18

    2020