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Paper Citation Record · LEDGER

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation

As of 19 August 2026, this Paper Citation Record lists 50 of 50 outbound references and 1 inbound Pith citation observation for arXiv:2503.11658.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2503.11658 v1

Coverage vector

measured 50 of 50 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-09T10:49:51.844347Z

measured 51 of 51 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-18T06:34:40.430872+00:00

measured 1 of 1 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-07-03T17:31:06.732545Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-07-03T17:38:43.473092Z

Reference resolution

50 of 50 outbound references displayed

  • verified exact20
  • verified fuzzy23
  • unresolved2
  • parse uncertain0
  • malformed identifier2
  • metadata mismatch3

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 835ded14-cf9a-4fc2-ba9b-d6206019f3a2 · outbound

This paper cites Applications of Arti ficial Intelligence on the Modeling and Optimization for Analog and Mixed- Signal Circuits: A Review,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Applications of Arti ficial Intelligence on the Modeling and Optimization for Analog and Mixed- Signal Circuits: A Review,

Reference 1

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metadata mismatch
raw_fallback, observed 2026-08-09T10:49:55.808117Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.572132Z digest=sha256:7c6dbd0786c6dc341ac842c322cf825a4dee9f4589aaa3a40cdef5c53140125d

Observation 8446ab7e-cc27-4715-af41-372bc7c7f9e9 · outbound

This paper cites AnGeL: Fully -Automated Analog Circuit Generator Using a Neural Network Assisted Semi - Supervised Learning Approach,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation AnGeL: Fully -Automated Analog Circuit Generator Using a Neural Network Assisted Semi - Supervised Learning Approach,

Reference 2

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verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:55.730225Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.578865Z digest=sha256:06df3601cb5e85074b59c8a06f207b07c2f26184c448652ed2f410225748b896

Observation ed884649-f3d7-4e1e-b57b-37eb189cf654 · outbound

This paper cites An Automated Circuit Topology Generation and Optimization Method for CMOS Low -Noise Amplifiers,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation An Automated Circuit Topology Generation and Optimization Method for CMOS Low -Noise Amplifiers,

Reference 3

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arxiv_id_nonexistent, observed 2026-08-09T10:49:55.577478Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.584468Z digest=sha256:2157b363190e3b20472ae3475ff15c01393a90c30c7066ff2c0f2f907f8f4fde

Observation 04668d1a-c8ee-4da4-87de-a72b1f7c68e2 · outbound

This paper cites A novel mobile application for circuit component identification and recognition through machine learning and image processing techniques,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation A novel mobile application for circuit component identification and recognition through machine learning and image processing techniques,

Reference 4

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:56.157132Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.589853Z digest=sha256:071711557d8da36db3293f7516a9ba8161400b5e964235858bce320b68efe545

Observation 3b677256-db8c-4ada-a954-c59aa1032644 · outbound

This paper cites Circuit recognition with deep learning,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Circuit recognition with deep learning,

Reference 5

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verified fuzzy
raw_fallback, observed 2026-08-09T10:49:56.142740Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.595345Z digest=sha256:5ca8e7f015fd53b7e8806a899b499cc76e8f9373d86ba4fb3dc84c0172c4b107

Observation f65768e7-9c1c-4d9c-ba23-f5be4cb0994c · outbound

This paper cites Offline hand-drawn circuit component recognition using texture and shape -based features,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Offline hand-drawn circuit component recognition using texture and shape -based features,

Reference 6

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:56.128018Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.601401Z digest=sha256:ac0658ad8e97937b16f5b88b8e555d4225f96d3a7f9d7c95a8ee1fb4626fdd7d

Observation 18b0aec9-a16c-4b0b-ac1e-de70c9d0ea1b · outbound

This paper cites Library -free structure recognition for analog circuits,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Library -free structure recognition for analog circuits,

Reference 7

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verified fuzzy
raw_fallback, observed 2026-08-09T10:49:56.113053Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.608294Z digest=sha256:9aa45f75b44326ef782b7cc89bec297b73fa40a74ab248846927b3936436a174

Observation 05316a78-6270-4ed4-b987-b3341a9b1b8a · outbound

This paper cites Deep Learning for Instance Retrieval: A Survey,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Deep Learning for Instance Retrieval: A Survey,

Reference 8

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arxiv_id_nonexistent, observed 2026-08-09T10:49:55.393357Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.615381Z digest=sha256:5ba6af3a66c926767986cdeda02277d2fdfb1e7c337a5fedd92fb07a30b3b49b

Observation 2a20f014-0e3c-4e3c-adbb-908746da9420 · outbound

This paper cites A Decade Survey of Content Based Image Retrieval Using Deep Learning,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation A Decade Survey of Content Based Image Retrieval Using Deep Learning,

Reference 9

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verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:55.235079Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.622793Z digest=sha256:efbe43914822a228437f3b910f3fe9695de6611d9028d67668c831876ea88f62

Observation fb1d46ec-2e7d-4005-abf6-a37f1ecacc24 · outbound

This paper cites Diagram Image Retrieval and Analysis: Challenges and Opportunities,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Diagram Image Retrieval and Analysis: Challenges and Opportunities,

Reference 10

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arxiv_id_nonexistent, observed 2026-08-09T10:49:55.062348Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.627989Z digest=sha256:e8bd057c94f2003b6abc03d1966de4b788dc318c86a76211b2293930d25a1b6a

Observation d79b8ef8-2aba-46a1-a329-6402302b8cc1 · outbound

This paper cites Network Science Meets Circuit Theory: Resistance Distance, Kirchhoff Index, and Foster’s Theorems With Generalizations and Unifi cation,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Network Science Meets Circuit Theory: Resistance Distance, Kirchhoff Index, and Foster’s Theorems With Generalizations and Unifi cation,

Reference 11

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verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:54.887270Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.633856Z digest=sha256:629c22e638e6cce2d34745f4ac6d64544ae505db80046cc171d0805ba2c2f86b

Observation 672482ef-7109-4548-b7c8-46d945f03bfb · outbound

This paper cites A Comprehensive and Unified Procedure for Symbolic Analysis of Analog Circuits,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation A Comprehensive and Unified Procedure for Symbolic Analysis of Analog Circuits,

Reference 12

Resolution
verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:54.703686Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.639575Z digest=sha256:2c0ef55e46b4258ab4fc29cc29991ff81aa6880ba5b1427c403d0f9381bfe4ec

Observation 814687f5-639f-45fa-8ef7-acdb5c914915 · outbound

This paper cites CktGNN: Circuit Graph Neural Network for Electronic Design Automation.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation CktGNN: Circuit Graph Neural Network for Electronic Design Automation

Reference 13

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unresolved
no resolver link, observed 2026-08-09T10:49:51.644806Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-09T10:49:51.644806Z digest=sha256:822483f23a00c022a8484cdb275e9a0e8f42466dcabd9bf0b02a4582284885c6

Observation 06946634-fcb8-4591-a4f7-3ffcefe2a21e · outbound

This paper cites Graph Attention -Based Symmetry Constraint Extraction for Analog Circuits,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Graph Attention -Based Symmetry Constraint Extraction for Analog Circuits,

Reference 14

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verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:54.518519Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.650471Z digest=sha256:d1ce29632b71efd77d8a530d2d4e41538db073c2adf92f292da9026b28f42a3b

Observation 9e0ebf5d-c16c-4ef5-8416-9bf608e76778 · outbound

This paper cites GANA: Graph Convolutional Network Based Automated Netlist Annotation for Analog Circuits,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation GANA: Graph Convolutional Network Based Automated Netlist Annotation for Analog Circuits,

Reference 15

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:56.096736Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.655928Z digest=sha256:a113ce6bac0d4a1707f96b93c5c734b98102ca84e7eebcbb4aa600fb756c33af

Observation a5f69797-604e-4012-a3c3-ba3a13274fcd · outbound

This paper cites Pretraining Graph Neural Networks for Few-Shot Analog Circuit Modeling and Design,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Pretraining Graph Neural Networks for Few-Shot Analog Circuit Modeling and Design,

Reference 16

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arxiv_id_nonexistent, observed 2026-08-09T10:49:54.337097Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.662194Z digest=sha256:41f38f017a0ace65aee467d5c05436960a9fdb6e27b28e762682d5fd9373e6f0

Observation 3e951639-eeff-4a8e-afc4-1a263d3224d4 · outbound

This paper cites A Novel Analog Physical Synthesis Methodology Integrating Existent Design Expertise,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation A Novel Analog Physical Synthesis Methodology Integrating Existent Design Expertise,

Reference 17

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arxiv_id_nonexistent, observed 2026-08-09T10:49:54.151545Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.667998Z digest=sha256:c9f125768eea3ac206e059c14ba75ee4827c6d52f2b156066278391cf1dbe91e

Observation 01032db5-1b39-4d75-bdcc-7576258ae866 · outbound

This paper cites Why are graph neural networks effective for eda problems?,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Why are graph neural networks effective for eda problems?,

Reference 18

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raw_fallback, observed 2026-08-09T10:49:56.082070Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.674099Z digest=sha256:9807eb94c31aa05bacccb3b3d39a37960a956b6ebda42bf7e2aa3138bb897a40

Observation 28ccc254-383d-4ddf-8c4a-c27ef426e736 · outbound

This paper cites ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks,

Reference 19

Resolution
verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:53.974430Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.679937Z digest=sha256:ba853574389a4db6c9aaa86c5b9971e81d5d8f685a7c27a935a5321baa63b209

Observation d4f5fe19-011d-4be8-a50e-131dac464357 · outbound

This paper cites GNN-RE: Graph Neural Networks for Reverse Engineering of Gate -Level Netlis ts,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation GNN-RE: Graph Neural Networks for Reverse Engineering of Gate -Level Netlis ts,

Reference 20

Resolution
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arxiv_id_nonexistent, observed 2026-08-09T10:49:53.790777Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.685690Z digest=sha256:4b936c02fccf84449d1c26bd7de27c58d7aa9cf53c12aa86580d4c73672f91a9

Observation 794ebf51-d0d1-4553-ad76-8baebd1d9de4 · outbound

This paper cites Fully Automated Analog Sub -Circuit Clustering with Graph Convoluti onal Neural Networks,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Fully Automated Analog Sub -Circuit Clustering with Graph Convoluti onal Neural Networks,

Reference 22

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verified fuzzy
raw_fallback, observed 2026-08-09T10:49:56.067506Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.697514Z digest=sha256:841f9607fe791c2b06af3915349889011c5eea14c014507ae7d52556be1d2d54

Observation 234e953c-df2c-4083-b3b5-e409e74b88ea · outbound

This paper cites Analog Layout S ynthesis with Knowledge Mining,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Analog Layout S ynthesis with Knowledge Mining,

Reference 23

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raw_fallback, observed 2026-08-09T10:49:56.052568Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.702560Z digest=sha256:63253d044e65829b3e3f1b57e74f93188f0a6f4ce351acab932fa5d989197588

Observation b66be89a-4361-464b-b5ba-2177047e5c32 · outbound

This paper cites Generalized Constraint Gen eration for Analog Circuit -Design,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Generalized Constraint Gen eration for Analog Circuit -Design,

Reference 24

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verified fuzzy
raw_fallback, observed 2026-08-09T10:49:56.037334Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.708299Z digest=sha256:cc93da570dfada037a85f253335933343cc4e429495e99d079a475646aeb03e9

Observation 04ba62ff-06c7-4ceb-8f97-a4c225d3a23d · outbound

This paper cites GCN -RL Circ uit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation GCN -RL Circ uit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning,

Reference 25

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verified fuzzy
raw_fallback, observed 2026-08-09T10:49:56.021763Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.714600Z digest=sha256:3127366790a30210022d16c60b94373dd19768f2bdd8e89248291562896f5f45

Observation 99beaa9f-78a9-4cc5-b5b8-5b3773539074 · outbound

This paper cites Universal Symmetry Constraint Extraction for Analog and Mixed -Signal Circuits with Graph Neural Networks,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Universal Symmetry Constraint Extraction for Analog and Mixed -Signal Circuits with Graph Neural Networks,

Reference 26

Resolution
verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:53.590186Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.720408Z digest=sha256:8a65da06b3e319df9a15b0b6202938adf163b674c0bd8aad206e40dd5c63408c

Observation a1ee1ee8-68d7-414b-87fe-ebd4ed54f89f · outbound

This paper cites Symmetry constraint based on mismatch analysis for analog layout in SOI technology,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Symmetry constraint based on mismatch analysis for analog layout in SOI technology,

Reference 27

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:56.006753Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.726716Z digest=sha256:cce5fbfe51a9d78c0f7a2a061333a9cc388c4aaee924f0b3ebebadad7c5ac5fb

Observation e8c65329-e4d9-4369-81e9-7c0455919c5a · outbound

This paper cites A customized graph neural network model for guiding analog IC placement,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation A customized graph neural network model for guiding analog IC placement,

Reference 28

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:55.977095Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.738175Z digest=sha256:634733074432ea9f909a68a8dfd52ae4a67c5fecf3cf28a5a3ebd4f057f9a686

Observation b595fc0e-a9fc-4837-aea8-57319f577b01 · outbound

This paper cites A two-stage prediction model for heterogeneous effects of many treatment options: application to drugs for Multiple Sclerosis.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation A two-stage prediction model for heterogeneous effects of many treatment options: application to drugs for Multiple Sclerosis

Reference 29

Resolution
metadata mismatch
local_arxiv, observed 2026-08-09T10:49:53.427397Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.743751Z digest=sha256:2818887f5d20d63070363b784f2ceb6d5427ad4119859b92d485f18446549785

Observation 185fbe60-b9ba-4774-ab6d-4a573a84c94a · outbound

This paper cites FEATS: Framework for Explorative Analog Topology Synthesis,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation FEATS: Framework for Explorative Analog Topology Synthesis,

Reference 30

Resolution
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arxiv_id_nonexistent, observed 2026-08-09T10:49:53.401833Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.749873Z digest=sha256:205c6b8369a0bbc5675ac5a1d57b193dc8fb196a9185546586a95e8eb85e7658

Observation ddf76ebc-a2c8-44d7-97b4-de21ec63a996 · outbound

This paper cites Analog constraints extraction based on the signal flow analysis,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Analog constraints extraction based on the signal flow analysis,

Reference 31

Resolution
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raw_fallback, observed 2026-08-09T10:49:55.962541Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.754959Z digest=sha256:58620f37bd4376b463197a6af4d0ab75446bf935597e6b4cde81904f8c4dfb48

Observation 0f23abb3-71ce-4d6b-8a6d-c9c1cebdc6bc · outbound

This paper cites Curl-free positive definite form of time-harmonic Maxwells equations well-suitable for iterative numerical solving.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Curl-free positive definite form of time-harmonic Maxwells equations well-suitable for iterative numerical solving

Reference 32

Resolution
metadata mismatch
local_arxiv, observed 2026-08-09T10:49:53.232302Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.760007Z digest=sha256:efbed7b9df1c0adf24774884bb4acb2af789f2ec48040e05395d74ee5abe9060

Observation f74df4cb-eb8b-4a46-a558-9d4a3e1c91cf · outbound

This paper cites Fast Isomorphism Testing for a Graph-based Analog Circuit Synthesis Framework,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Fast Isomorphism Testing for a Graph-based Analog Circuit Synthesis Framework,

Reference 33

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raw_fallback, observed 2026-08-09T10:49:55.948012Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.765243Z digest=sha256:29c425767fcc04416d983f9994d2b53a45fab8ea57a036aaaffaed575aac7a2b

Observation 705639eb-a8e7-4b49-baf3-a21ef90e80a8 · outbound

This paper cites Global stacking for analog circuits,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Global stacking for analog circuits,

Reference 34

Resolution
verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:53.207849Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.769917Z digest=sha256:8448ba23f54a4223b9da0789975e644fda2572987aaea784190ddc3f25434866

Observation 2a97df8c-ee43-4d0d-bf8b-c6733e203260 · outbound

This paper cites A general approach for identifying hierarchical symmetry constraints for analog circuit layout,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation A general approach for identifying hierarchical symmetry constraints for analog circuit layout,

Reference 35

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:55.933575Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.774214Z digest=sha256:119c93c5797a2cd272068f52fd6ce2a6709e2594c6759ebab0ea5d15bb4eb325

Observation e62290cb-8da2-442c-88b9-ac3ec569cb23 · outbound

This paper cites Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization,

Reference 36

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:55.919011Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.778536Z digest=sha256:a51c6c00c32f01f92b9c5813c826a7ea02a37ff0afac653af7943697216c41fc

Observation 4e67f584-3b1d-4bbc-bf20-f38ad761df75 · outbound

This paper cites Subgemini - Identifying Subcircuits Using a Fast Subgraph Isomorphism Algorithm,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Subgemini - Identifying Subcircuits Using a Fast Subgraph Isomorphism Algorithm,

Reference 37

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:55.903891Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.782997Z digest=sha256:3a3e55a5b841c2d0ed999195df9680b603038e007137fcbf7f031a2079f32406

Observation 1480b0c7-9385-4651-9929-1e66c75872cb · outbound

This paper cites Graph Neural Networks for Circuit Diagram Pattern Generation,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Graph Neural Networks for Circuit Diagram Pattern Generation,

Reference 38

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:55.887498Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.787541Z digest=sha256:b9830e02590bd9b0bbf38ff8412da97800ae235a9e0d90ca68de5e59f2357c3d

Observation c828f464-3a65-4266-be13-a24668d6e2b7 · outbound

This paper cites Layout Symmetry Annotation for Analog Circuits with Graph Neural Networks,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Layout Symmetry Annotation for Analog Circuits with Graph Neural Networks,

Reference 39

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:55.871155Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.792223Z digest=sha256:9cbc66d7f2c036ec8376c61dd968725726bee2bdb7025ad66e002b9ac2460bd0

Observation 175f0054-a9b3-4e2e-9d08-4b1508c11dd7 · outbound

This paper cites S3DET: Detecting System Symmetry Constraints for Analog Circuits with Graph Similarity,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation S3DET: Detecting System Symmetry Constraints for Analog Circuits with Graph Similarity,

Reference 40

Resolution
malformed identifier
arxiv_id_nonexistent, observed 2026-08-09T10:49:52.975919Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.796556Z digest=sha256:bf103c4b6bd1d64d87fdf64b246def1a4d3d62272a50a718ee1c80718cb5460a

Observation 010e69f4-176d-48bb-81fe-ed6a385bd08f · outbound

This paper cites A metho d for analog circuits visualization,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation A metho d for analog circuits visualization,

Reference 41

Resolution
verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:52.795232Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.801125Z digest=sha256:1d43fde299226923299f5d243f851f832850c61624b00022b6cd2a086230f472

Observation b0e2a32d-0f07-4b97-9f47-63f84a3dff09 · outbound

This paper cites Optimum Cmos Stack Generation with Analog Constraints,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Optimum Cmos Stack Generation with Analog Constraints,

Reference 42

Resolution
verified exact
doi, observed 2026-08-09T10:49:51.902126Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.806708Z digest=sha256:c2f659aa8bd833b0a03284f4a46b97dd2a5e0480cddac4d1d05a6f6f9e9d77bf

Observation f3d54276-1b2a-4832-80d8-798d89d488c0 · outbound

This paper cites YOLOv8: A Novel Object Detection Algorithm with Enhanced Perfor mance and Robustness,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation YOLOv8: A Novel Object Detection Algorithm with Enhanced Perfor mance and Robustness,

Reference 43

Resolution
verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:52.495947Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.811410Z digest=sha256:d4bad42925982b7ffdfb6ed781a6c5d2194f497230e72aecba0a8d860620655b

Observation 48b07245-6062-4396-a10f-e1fdd77c0ca4 · outbound

This paper cites VarifocalNet: An IoU -aware Dense Object Detector,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation VarifocalNet: An IoU -aware Dense Object Detector,

Reference 44

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:55.854686Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.815899Z digest=sha256:37df615a18122f0ba06618ddda65047395bdbacb55623343488866ae235eb50b

Observation 8ca1e375-071a-4604-ae41-def861af74d6 · outbound

This paper cites Generalized Focal Loss: Learning Qualified and Distributed Bounding Boxes for Dense Object Detection.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Generalized Focal Loss: Learning Qualified and Distributed Bounding Boxes for Dense Object Detection

Reference 45

Resolution
unresolved
no resolver link, observed 2026-08-09T10:49:51.820001Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-09T10:49:51.820001Z digest=sha256:383662eb809cff78893559509be466e94ecf16f567fadbd7f18fccc26cf3f6c0

Observation e3be91a9-83c1-44f4-8f65-36e0df1b8e86 · outbound

This paper cites A Distance Measure between Attributed Relational Graphs for Pattern -Recognition,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation A Distance Measure between Attributed Relational Graphs for Pattern -Recognition,

Reference 46

Resolution
verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:52.280420Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.825502Z digest=sha256:c79e8ac5a844f4e1a7d5958f0b43adf5361d80f8b9d606e67a69c23470442acd

Observation de9e8ffe-ea38-4afb-a8f0-520493b04924 · outbound

This paper cites A graph distance metric based on the maximal common subgraph,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation A graph distance metric based on the maximal common subgraph,

Reference 47

Resolution
malformed identifier
doi_truncated, observed 2026-08-09T10:49:51.884490Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.830436Z digest=sha256:0138410ecff34c63429889cc9df13997203b3a382fde3ca7bc0e64a89548715b

Observation 2534408f-7031-4f71-a40b-75d64a56fe72 · outbound

This paper cites Accelerating Graph Similarity Search via Efficient GED Computation,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Accelerating Graph Similarity Search via Efficient GED Computation,

Reference 48

Resolution
verified exact
arxiv_id_nonexistent, observed 2026-08-09T10:49:52.092485Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.835148Z digest=sha256:3e41ea551ed3da2f565ca9146d5fd30870afeaae97e1e12548502260d2ccc704

Observation ddfa85c3-2523-4e48-a295-5b19c5b0cad0 · outbound

This paper cites Learning with average precision: Training image retrieval with a listwise loss,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Learning with average precision: Training image retrieval with a listwise loss,

Reference 49

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:55.840557Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.839561Z digest=sha256:7e6c389949419054614e59481611b476ab538d0ac49bbcd9b05c04d214c656ee

Observation d16445ea-a8ac-4189-b1a2-1feb487c96ab · outbound

This paper cites PyRetri: A PyTorch-based library for unsupervised image retrieval by Deep Convolutional Neural Networks,.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation PyRetri: A PyTorch-based library for unsupervised image retrieval by Deep Convolutional Neural Networks,

Reference 50

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:55.824762Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.844347Z digest=sha256:35fa18b17cd547f670d5d1348c65adda7c133c093db3a8137a625260b5e649c2

Observation 764a9237-024e-4634-8959-be5c6654d573 · outbound

This paper cites Available: <Go to ISI>://WOS:000257065100142.

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation Available: <Go to ISI>://WOS:000257065100142

Reference 2008

Resolution
verified fuzzy
raw_fallback, observed 2026-08-09T10:49:55.992017Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-08-09T10:49:51.732836Z digest=sha256:2cddf15340e47b3cd57df7dd88b118153e6ca50ff7bd92e67bc987f4eb5f239d

Pith citing papers

Observation 3eb3291a-9e54-44fc-baad-b2c3349102dc · inbound

SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence cites this paper.

SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation

Reference 50

Resolution
verified exact
arxiv_id, observed 2026-07-03T17:38:43.474546Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

source=pdf_text observed=2026-07-03T17:31:06.732545Z digest=sha256:97ef614c5bc760aa982fbf616dc3f4e8d30cbfe49f3b5a18c234d40c4fd947ed