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High Performance Code Generation in MLIR: An Early Case Study with GEMM

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arxiv 2003.00532 v1 pith:PWW7AQA6 submitted 2020-03-01 cs.PF

Uday Bondhugula This is my paper · ORCID
classification cs.PF
keywords codeinfrastructuremlirarticlecasecompilerearlygeneration
verification ladder T0 review T1 audit T2 compute T3 formal

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This article is primarily meant to present an early case study on using MLIR, a new compiler intermediate representation infrastructure, for high-performance code generation. Aspects of MLIR covered in particular include memrefs, the affine dialect, and polyhedral utilities and pass infrastructure surrounding those. This article is also aimed at showing the role compiler infrastructure could play in generating code that is competitive with highly tuned manually developed libraries, albeit in a more modular, reusable, and automatable way.

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Cited by 2 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions

    cs.PL 2025-02 conditional novelty 6.0 of 10

    A multi-level MLIR/xDSL backend for the Snitch RISC-V accelerator reaches up to 95% FPU utilization on micro-kernels and 90% when lowered from linalg, without register spilling.

  2. FluidML: Fast and Memory Efficient Inference Optimization

    cs.LG 2024-11 reject novelty 5.0 of 10

    FluidML combines graph splitting, dynamic programming, and greedy memory allocation to optimize ML inference memory layout, but its reported improvements are inconsistent across models and its headline numbers contrad...

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