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Paper Citation Record · LEDGER

TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

As of 10 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 14 inbound Pith citation observations for arXiv:2304.01433.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2304.01433 v3

Coverage vector

measured 0 of 0 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links

measured 14 of 14 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-09T06:31:02.800959+00:00

measured 14 of 14 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-08T14:14:35.272822Z

measured 1 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-08-05T02:28:24.338817Z

Reference resolution

0 of 0 outbound references displayed

  • verified exact0
  • verified fuzzy0
  • unresolved0
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch0

External citation measurements

19
arxiv_reference, observed 2026-08-05T02:28:24.338817Z

Outbound references

No outbound reference observations are available for this paper version.

Pith citing papers

Observation c53e8b4c-ee26-4ff3-a35a-0b13bba3ebe3 · inbound

Simple synthetic data reduces sycophancy in large language models cites this paper.

Simple synthetic data reduces sycophancy in large language models TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 16

Resolution
verified exact
arxiv_id, observed 2026-05-16T14:48:08.586330Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

source=arxiv_source observed=2026-05-16T14:48:08.508109Z digest=sha256:0992b5e1a4c132c8a526983450721247a3975f6efb9f085790ca1a3da5aeec92

Observation a383b0ba-cb36-47ff-a4f3-5a3c501ef85f · inbound

Machine Learning Fleet Efficiency: Analyzing and Optimizing Large-Scale Google TPU Systems with ML Productivity Goodput cites this paper.

Machine Learning Fleet Efficiency: Analyzing and Optimizing Large-Scale Google TPU Systems with ML Productivity Goodput TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 28

Resolution
unresolved
no resolver link, observed 2026-08-08T14:14:35.272822Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-08T14:14:35.272822Z digest=sha256:dc5d0f32aa0f625499b665f4b46a7970658613593f8cf7112955487710119f47

Observation 233239b0-c324-4270-a095-67d6cd36adee · inbound

KernelBench: Can LLMs Write Efficient GPU Kernels? cites this paper.

KernelBench: Can LLMs Write Efficient GPU Kernels? TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 14

Resolution
verified exact
arxiv_id, observed 2026-05-15T16:55:02.050250Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

source=pdf_text observed=2026-05-15T16:55:01.976356Z digest=sha256:52dceb1f8e5d3b1362db45a6ce18f12712b31f1ec91785f070ef142240089798

Observation e650dc4b-5ccd-450d-b1e4-5dd5ffbcb918 · inbound

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations cites this paper.

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 28

Resolution
unresolved
no resolver link, observed 2026-08-06T22:04:35.821507Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T22:04:35.821507Z digest=sha256:2d669119477f3e6ae2b72a6241c2c15d0c3b45f036fb8fe7f81fa987fe2370f6

Observation 939fca8f-dfa5-4624-abb4-4cceb77a0d69 · inbound

A Survey on Efficiency Optimization Techniques for DNN-based Video Analytics: Process Systems, Algorithms, and Applications cites this paper.

A Survey on Efficiency Optimization Techniques for DNN-based Video Analytics: Process Systems, Algorithms, and Applications TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 139

Resolution
unresolved
no resolver link, observed 2026-08-06T15:30:19.998603Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T15:30:19.998603Z digest=sha256:9151e0dd4e1c3eaa00a2b3c7c22b423abb47a1af6f63e78726e1dab0cfc39937

Observation 8fee8b54-0805-46a9-9005-d92ed78fc734 · inbound

Toward Lifelong-Sustainable Electronic-Photonic AI Systems via Extreme Efficiency, Reconfigurability, and Robustness cites this paper.

Toward Lifelong-Sustainable Electronic-Photonic AI Systems via Extreme Efficiency, Reconfigurability, and Robustness TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 16

Resolution
unresolved
no resolver link, observed 2026-08-04T22:22:06.777578Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-04T22:22:06.777578Z digest=sha256:c923a05ffcffc809a66aa23c1bc2deaa2655d1122d01486129cbf7adeaf4530f

Observation 70b5ce84-1ed2-4cbe-848d-d755e6ed40cf · inbound

SindBERT, the Sailor: Charting the Seas of Turkish NLP cites this paper.

SindBERT, the Sailor: Charting the Seas of Turkish NLP TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 16

Resolution
unresolved
no resolver link, observed 2026-08-04T08:22:13.822491Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=arxiv_source observed=2026-08-04T08:22:13.822491Z digest=sha256:f762ee790087be44f301788fd420c0c8b8c203adbed4c21bcfa3ad220caa307e

Observation 61bc710d-ccf1-466e-990c-ce34151969b5 · inbound

HalleluBERT: Let Every Token That Has Meaning Bear Its Weight cites this paper.

HalleluBERT: Let Every Token That Has Meaning Bear Its Weight TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 11

Resolution
unresolved
no resolver link, observed 2026-08-04T08:21:42.767563Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=arxiv_source observed=2026-08-04T08:21:42.767563Z digest=sha256:8d1e544084e23efeafbdc80ef645c8ec403a921cc37de7b40e24ca7b0a2256ad

Observation 372eead8-4bb8-4b78-9ea8-f9ea692621ce · inbound

A Switch-Centric In-Network Architecture for Accelerating LLM Inference in Shared-Memory Network cites this paper.

A Switch-Centric In-Network Architecture for Accelerating LLM Inference in Shared-Memory Network TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 33

Resolution
verified exact
arxiv_id, observed 2026-05-14T01:58:36.943474Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

source=pdf_text observed=2026-05-14T01:54:00.951348Z digest=sha256:de209b08e4e3c178aa651e8e8ce1f440debe1739756f6f65d8a396e838feb542

Observation fed2d7af-fe88-47d0-90d5-ecca2046fc86 · inbound

Latent Instruction Representation Alignment: defending against jailbreaks, backdoors and undesired knowledge in LLMs cites this paper.

Latent Instruction Representation Alignment: defending against jailbreaks, backdoors and undesired knowledge in LLMs TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 22

Resolution
verified exact
arxiv_id, observed 2026-05-11T08:21:00.048821Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

source=arxiv_source observed=2026-05-10T16:41:52.440793Z digest=sha256:20c65ad2a64124aa7e33065713407d68bdf02ea719bb0e6f809a10733c68b100

Observation a784dd5e-578c-439e-b7d6-0250a8c7ee18 · inbound

Enabling AI ASICs for Zero Knowledge Proof cites this paper.

Enabling AI ASICs for Zero Knowledge Proof TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 22

Resolution
verified exact
arxiv_id, observed 2026-05-11T11:56:31.862935Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

source=pdf_text observed=2026-05-10T04:23:40.022306Z digest=sha256:c3109a3c94d34618e2257edc657b9cc74c2c888bb93e14de505bec7b10d39e56

Observation 5c239ef0-fd85-4704-bb96-0e506fa8bc19 · inbound

Mass Matrix Assembly on Tensor Cores for Implicit Particle-In-Cell Methods cites this paper.

Mass Matrix Assembly on Tensor Cores for Implicit Particle-In-Cell Methods TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 4

Resolution
verified exact
arxiv_id, observed 2026-05-10T01:51:00.282493Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

source=pdf_text observed=2026-05-10T01:48:28.819072Z digest=sha256:f2949684ebcd86aa2d5a1cb02311cda6b0b77ce87ae139025730d575eaacf63c

Observation 4deb1d31-be1e-4db7-9f84-b28be29f7590 · inbound

PortBERT: Navigating the Depths of Portuguese Language Models cites this paper.

PortBERT: Navigating the Depths of Portuguese Language Models TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 87

Resolution
verified exact
arxiv_id, observed 2026-06-28T14:52:18.768211Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

source=arxiv_source observed=2026-06-28T14:43:28.401687Z digest=sha256:f65b656e286448b6a8fecaad3bbfd2d87be313ef26854fc866c43bb9b4b32ee3

Observation a7b4dcea-b357-44ab-b5ff-abdad9fe2070 · inbound

AoiZora: Topology-Aware Auto-Parallel Optimization for Inference of Diffusion Transformers cites this paper.

AoiZora: Topology-Aware Auto-Parallel Optimization for Inference of Diffusion Transformers TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Reference 17

Resolution
verified exact
arxiv_id, observed 2026-07-03T22:59:03.360219Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

source=pdf_text observed=2026-06-26T23:07:13.368633Z digest=sha256:d8cdad9762c7e3c371a29de5b482c33fb91331882fd566ebd4f6d7901644b981