Paper Citation Record · LEDGER

Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

As of 10 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 11 inbound Pith citation observations for arXiv:2501.12084.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2501.12084 v2

Coverage vector

measured 0 of 0 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links

measured 11 of 11 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-10T06:31:04.303077+00:00

measured 11 of 11 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-06T17:31:26.949092Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-07-04T09:49:43.794027Z

Reference resolution

0 of 0 outbound references displayed

verified exact0
verified fuzzy0
unresolved0
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

No outbound reference observations are available for this paper version.

Pith citing papers

Observation 960e8bc9-474a-4be0-afd7-896d3e088478 · inbound

Dissecting the NVIDIA Blackwell Architecture with Microbenchmarks cites this paper.

Dissecting the NVIDIA Blackwell Architecture with Microbenchmarks Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-06T17:31:26.949092Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 678fa017-c81b-4424-afa6-261562347232 · inbound

DASH: Deterministic Attention Scheduling for High-throughput Reproducible LLM Training cites this paper.

DASH: Deterministic Attention Scheduling for High-throughput Reproducible LLM Training Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 4

Resolution: unresolved; no resolver link, observed 2026-08-03T06:51:59.379321Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation e69e4da4-8360-4be2-849e-c1862130d23a · inbound

AsyncSparse: Accelerating Sparse Matrix-Matrix Multiplication on Asynchronous GPU Architectures cites this paper.

AsyncSparse: Accelerating Sparse Matrix-Matrix Multiplication on Asynchronous GPU Architectures Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 16

Resolution: verified exact; arxiv_id, observed 2026-05-10T12:15:22.964401Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

Observation c5c7ff95-99ea-4ad9-b1fb-3fae1958fd53 · inbound

Sim-FA: A GPGPU Simulator Framework for Fine-Grained Asynchronous Pipeline Analysis cites this paper.

Sim-FA: A GPGPU Simulator Framework for Fine-Grained Asynchronous Pipeline Analysis Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 9

Resolution: verified exact; arxiv_id, observed 2026-05-11T16:06:26.907913Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

Observation cdc9811a-79b8-499e-ab7c-c0a075883548 · inbound

Sim-FA: A GPGPU Simulator Framework for Fine-Grained Asynchronous Pipeline Analysis cites this paper.

Sim-FA: A GPGPU Simulator Framework for Fine-Grained Asynchronous Pipeline Analysis Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-02T15:09:43.707096Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 13fffc70-81ff-4b5f-98ac-cbcb0cff6043 · inbound

Microbenchmark-Driven Analytical Performance Modeling Across Modern GPU Architectures cites this paper.

Microbenchmark-Driven Analytical Performance Modeling Across Modern GPU Architectures Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 21

Resolution: verified exact; arxiv_id, observed 2026-05-09T06:30:42.794844Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

Observation 675576ad-bf3b-46d0-9434-2ac1b5c33f0b · inbound

TLX: Hardware-Native, Evolvable MIMW GPU Compiler for Large-scale Production Environments cites this paper.

TLX: Hardware-Native, Evolvable MIMW GPU Compiler for Large-scale Production Environments Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 16

Resolution: verified exact; arxiv_id, observed 2026-05-12T03:56:21.779416Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

Observation 982936eb-8b35-4a0d-b124-f62aadbfc7e6 · inbound

TLX: Hardware-Native, Evolvable MIMW GPU Compiler for Large-scale Production Environments cites this paper.

TLX: Hardware-Native, Evolvable MIMW GPU Compiler for Large-scale Production Environments Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 16

Resolution: verified exact; arxiv_id, observed 2026-05-15T05:09:44.681107Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

Observation d69472ea-d094-4ecd-abec-4a9f775317ab · inbound

Non-Uniform L2 Cache Latency Across the Streaming Multiprocessors of an NVIDIA L40 cites this paper.

Non-Uniform L2 Cache Latency Across the Streaming Multiprocessors of an NVIDIA L40 Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 6

Resolution: verified exact; arxiv_id, observed 2026-07-04T09:49:43.796564Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

Observation 4bc23676-0a0e-45e0-8478-fcc922e1fcd3 · inbound

TileLens: Efficiently Using Large-Granularity Memory Systems with Transparent Two-Dimensional Memory Layout cites this paper.

TileLens: Efficiently Using Large-Granularity Memory Systems with Transparent Two-Dimensional Memory Layout Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 25

Resolution: unresolved; no resolver link, observed 2026-07-11T22:11:17.609849Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 17e1bd65-3bc7-4cdb-b3ac-1ead73719e1a · inbound

GPU-Tile-Sim: A Tile-Centric GPU Simulation Framework for LLM Hardware-Software Co-Design cites this paper.

GPU-Tile-Sim: A Tile-Centric GPU Simulation Framework for LLM Hardware-Software Co-Design Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Reference 21

Resolution: unresolved; no resolver link, observed 2026-07-14T05:56:09.845073Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.