Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-08-05T16:41:40.827128Z
Paper Citation Record · LEDGER
As of 14 August 2026, this Paper Citation Record lists 14 of 14 outbound references and 1 inbound Pith citation observation for arXiv:2508.18043.
A citation records a reference. It does not transfer a finding from one paper to another.
Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-08-05T16:41:40.827128Z
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-14T06:32:32.682623+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-05-09T18:14:34.542488Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-05-11T16:16:09.335950Z
14 of 14 outbound references displayed
External citation measurements
No source-named external measurement is stored.
Observation 2f297242-3ab2-4bf8-9a50-b4e9ddff49c4 · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System Garnet: A detailed on- chip network model inside a full-system simulator
Reference 1
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation 1e1a8dd6-0c7c-4843-96ec-2b73078e90ad · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System The GAP Benchmark Suite
Reference 2
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation d8f326bf-d686-4bd4-b6a5-202b2e0a8f74 · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System The gem5 simulator.ACM SIGARCH computer architecture news, 39(2):1–7, 2011
Reference 3
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation c6eeb2fa-340b-461f-9396-17ac270496cc · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System Fix Performance Bottlenecks with Intel® VTune™ Profiler
Reference 4
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation 6f44e8ce-f624-4913-8c36-55c744082d48 · outbound
Reference 5
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation a1a4e284-ff3c-4454-878c-2bd4a544f056 · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System Elsevier, 2011
Reference 6
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 02dcf0f1-cde6-4414-8461-963282cbf751 · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System gem5 documentation.https://www.gem5.org/documentation/, 2025
Reference 7
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation c62b79fe-d243-4f14-9982-0e7a0ab5196a · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System The gem5 Simulator: Version 20.0+
Reference 8
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation dd347dc5-07ba-47ef-a1dd-07a32eb69522 · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System URLhttps://man7.org/linux/ man-pages/man2/syscalls.2.html
Reference 9
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation bc077e31-d5e3-42f5-8205-7bb97344d55f · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System Automatically characterizing large scale program behavior
Reference 10
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation 0aef5775-cab5-4a1a-ad96-40ad1ad0136a · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System SPEC 2017 documentation, 2017
Reference 11
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation 269c4021-2b1f-4fe1-983a-531ce6f9772e · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System An efficient algorithm for exploiting multiple arithmetic units.IBM Journal of research and Development, 11(1):25–33, 1967
Reference 12
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation 2ef14a5c-7141-4eae-b9f2-611baed539fc · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System Profiling gem5 simulator
Reference 13
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation 67fe9054-8e66-4f85-a292-f2a71646780a · outbound
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System Unresolved cited work
Reference 14
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.
Observation 0e25057e-e9e4-4ed7-9e53-a61bf5ecf100 · inbound
Understanding Simulated Architecture via gem5 Call-Stack Profiling Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System
Reference 18
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.