Local Homophily on Bicolored Graphs is P-complete
Pith reviewed 2026-05-08 15:14 UTC · model grok-4.3
The pith
Local homophily on bicolored graphs can simulate arbitrary Boolean circuits, rendering vertex-connectivity questions P-complete under logspace reductions.
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
Core claim
We show how to simulate Boolean circuits using local homophily and establish that determining whether a given pair of vertices becomes connected under iterative applications of local homophily is P-complete under logspace reductions.
What carries the argument
The local homophily transformation: a vertex recolors to the majority of its current neighbors, then adds edges between same-color neighbors and deletes edges between opposite-color neighbors.
If this is right
- Any logspace reduction from a P-complete circuit problem to the local-homophily connectivity question immediately yields a P-completeness result for that question.
- Local majority recoloring combined with homophily rewiring is sufficient to implement AND, OR, and NOT gates.
- The long-term connectivity pattern produced by the dynamics is computationally as hard as evaluating arbitrary Boolean circuits.
- Logspace reductions suffice to transfer hardness from circuit problems to the graph-evolution problem.
Where Pith is reading between the lines
- Similar local rewiring rules on larger classes of graphs may also embed universal computation and therefore inherit P-hardness for their prediction problems.
- If real-world networks evolve by approximate versions of this rule, forecasting their eventual connectivity structure is at least as hard as solving P-complete problems.
- One could test the robustness of the simulation by adding small amounts of noise to the majority rule and checking whether the P-completeness threshold survives.
Load-bearing premise
Initial bicolored graphs can be chosen so that the local-homophily dynamics faithfully reproduce the gate logic and wiring of any Boolean circuit without introducing extra connections or losing required ones.
What would settle it
A concrete small Boolean circuit together with a proof that no finite initial bicolored graph exists whose local-homophily evolution makes the designated output vertices connect exactly when the circuit evaluates to true.
Figures
read the original abstract
We propose a local transformation on bicolored graphs, which we call local homophily, inspired by adaptive networks and based on majority dynamics and homophily. In this transformation, a vertex updates its color to match the majority of its neighbors, while neighbors of the same color become connected and neighbors of the opposite color become disconnected. We show how to simulate Boolean circuits using local homophily and establish that determining whether a given pair of vertices becomes connected under iterative applications of local homophily is $\mathbf{P}$-complete under logspace reductions.
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The paper defines a local homophily transformation on bicolored graphs in which each vertex adopts the majority color among its neighbors while edges are added between same-color neighbors and removed between opposite-color neighbors. It claims to encode arbitrary Boolean circuits as initial bicolored graphs such that iterative application of the transformation makes a designated pair of vertices connected precisely when the circuit evaluates to true, and proves that deciding this connectivity question is P-complete under logspace reductions.
Significance. If the simulation is valid, the result supplies a new natural P-complete problem arising from a local majority-plus-homophily dynamics, extending the catalog of P-complete graph processes and linking adaptive-network models to complexity theory. The logspace reduction from a standard P-complete problem (presumably CVP) is a positive feature when the construction is fully verified.
major comments (2)
- [Section 3] The reduction construction (Section 3 on circuit simulation): the manuscript must supply an explicit argument that simultaneous majority updates and global rewiring do not create cross-talk or shortcuts between intended gate subgraphs. Because every vertex and edge can change in each global step, color flips or new same-color edges could propagate across gate boundaries and alter the final connectivity of the output pair independently of the circuit value; without a lemma isolating the subgraphs (e.g., via fixed-color buffers, timing layers, or asynchronous scheduling), the claimed equivalence between circuit evaluation and connectivity fails.
- [Section 4] The logspace reduction (Section 4): the initial bicolored graph must be shown to be logspace-constructible from the circuit description, including the precise placement of vertices, initial colors, and edges that encode gates. The paper should also clarify whether connectivity is checked after a polynomial number of steps, at stabilization, or for some existential number of iterations, and prove that the process remains polynomial-time overall.
minor comments (2)
- [Abstract] The abstract states that the simulation and reduction exist but supplies no high-level sketch of the graph encoding; a single sentence describing the key isolation technique would improve readability.
- [Section 2] Notation for the transformation (Definition 2.1 or equivalent): the update rule for colors and edges should be stated with a single formal equation or pseudocode block rather than prose only, to facilitate verification of the dynamics.
Simulated Author's Rebuttal
Thank you for the referee's thorough review and insightful comments on our manuscript. We appreciate the opportunity to clarify and strengthen our arguments. Below, we address each major comment point by point, indicating the revisions we will make.
read point-by-point responses
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Referee: [Section 3] The reduction construction (Section 3 on circuit simulation): the manuscript must supply an explicit argument that simultaneous majority updates and global rewiring do not create cross-talk or shortcuts between intended gate subgraphs. Because every vertex and edge can change in each global step, color flips or new same-color edges could propagate across gate boundaries and alter the final connectivity of the output pair independently of the circuit value; without a lemma isolating the subgraphs (e.g., via fixed-color buffers, timing layers, or asynchronous scheduling), the claimed equivalence between circuit evaluation and connectivity fails.
Authors: We acknowledge that the current manuscript lacks an explicit isolation lemma, which is essential for rigorously proving that the circuit simulation is not affected by unintended interactions. In the revised manuscript, we will introduce a dedicated lemma in Section 3 that demonstrates the isolation of gate subgraphs. This will be achieved by incorporating fixed-color buffer vertices and layered timing mechanisms that prevent color propagation and edge rewiring from crossing gate boundaries. We will prove that under these constructions, the dynamics within each gate subgraph proceed independently, preserving the intended Boolean computation. revision: yes
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Referee: [Section 4] The logspace reduction (Section 4): the initial bicolored graph must be shown to be logspace-constructible from the circuit description, including the precise placement of vertices, initial colors, and edges that encode gates. The paper should also clarify whether connectivity is checked after a polynomial number of steps, at stabilization, or for some existential number of iterations, and prove that the process remains polynomial-time overall.
Authors: We agree that additional details are needed to fully establish the logspace reduction. In the revision, we will explicitly describe the logspace construction: vertices and edges are placed according to a systematic enumeration of the circuit's gates and wires, which can be done by a logspace transducer since it involves only local copying and indexing of the input circuit description. Initial colors are assigned based on gate types in a straightforward manner. Regarding the timing, connectivity between the designated pair is checked after a polynomial number of steps, specifically after O(depth of the circuit) iterations, which suffices for the signal to propagate through the simulated circuit. We will add a proof that the overall decision procedure is in P, as the graph size is polynomial in the circuit size, each transformation step is computable in polynomial time, and the number of steps is polynomial. revision: yes
Circularity Check
No circularity: standard logspace reduction from known P-complete problem via explicit circuit simulation construction
full rationale
The paper's central result is a P-completeness proof obtained by exhibiting a logspace-constructible family of bicolored graphs that encode arbitrary Boolean circuits such that the iterative local homophily process (majority-color update plus homophily rewiring) connects a designated pair of vertices exactly when the circuit evaluates to true. This is a conventional reduction technique that does not rely on any self-definitional equations, fitted parameters renamed as predictions, or load-bearing self-citations. The derivation chain consists of (1) defining the local homophily operator, (2) constructing the encoding graph from the circuit instance, and (3) proving that the dynamics preserve the circuit semantics; none of these steps reduces to the target claim by construction. The result is therefore self-contained against external benchmarks (the standard Circuit Value Problem) and receives the default non-circularity finding.
Axiom & Free-Parameter Ledger
axioms (1)
- standard math Boolean circuit evaluation is P-complete under logspace reductions
invented entities (1)
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local homophily transformation
no independent evidence
Reference graph
Works this paper leans on
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