The reviewed record of science sign in
Pith

arxiv: 2508.13840 · v1 · pith:5H5YNJIV · submitted 2025-08-19 · cs.DC

Is RISC-V ready for High Performance Computing? An evaluation of the Sophon SG2044

Reviewed by Pith T0 review T1 audit T2 compute T3 formal T4 kernel pith:5H5YNJIVrecord.jsonopen to challenge →

classification cs.DC
keywords performancesg2044computinghighrisc-vsg2042architecturesbeen
0
0 comments X
read the original abstract

The pace of RISC-V adoption continues to grow rapidly, yet for the successes enjoyed in areas such as embedded computing, RISC-V is yet to gain ubiquity in High Performance Computing (HPC). The Sophon SG2044 is SOPHGO's next generation 64-core high performance CPU that has been designed for workstation and server grade workloads. Building upon the SG2042, subsystems that were a bottleneck in the previous generation have been upgraded. In this paper we undertake the first performance study of the SG2044 for HPC. Comparing against the SG2042 and other architectures, we find that the SG2044 is most advantageous when running at higher core counts, delivering up to 4.91 greater performance than the SG2042 over 64-cores. Two of the most important upgrades in the SG2044 are support for RVV v1.0 and an enhanced memory subsystem. This results in the SG2044 significantly closing the performance gap with other architectures, especially for compute-bound workloads.

This paper has not been read by Pith yet.

discussion (0)

Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.

Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score.

  1. Is RISC-V Ready for Massively Parallel Astrophysical Codes?

    cs.DC 2026-06 accept novelty 5.0

    Performance evaluation of iPIC3D, PLUTO, and OpenGadget3 on RISC-V shows 3-9x slowdowns versus x86 and ARM due to bandwidth, cache, vector width, and compiler issues.