Pith. sign in

REVIEW 2 cited by

Stella Nera: A Differentiable Maddness-Based Hardware Accelerator for Efficient Approximate Matrix Multiplication

Not yet reviewed by Pith; the record is open.

This paper has not been read by Pith yet. Machine review is queued; the pith claim, tier, and objections will appear here once it completes.

SPECIMEN: schema-true, not a live event

T0 review · schema-true

One-sentence machine reading of the paper's core claim.

pith:XXXXXXXX · record.json · timestamp

arxiv 2311.10207 v2 pith:DQCLT6V7 submitted 2023-11-16 cs.AR cs.CVcs.LGstat.ML

classification cs.ARcs.CVcs.LGstat.ML
keywords matrixacceleratoracceleratorsachievingadvancementscomplexitycomputationaldifferentiable
verification ladder T0 review T1 audit T2 compute T3 formal
0 comments
read the original abstract

Artificial intelligence has surged in recent years, with advancements in machine learning rapidly impacting nearly every area of life. However, the growing complexity of these models has far outpaced advancements in available hardware accelerators, leading to significant computational and energy demands, primarily due to matrix multiplications, which dominate the compute workload. Maddness (i.e., Multiply-ADDitioN-lESS) presents a hash-based version of product quantization, which renders matrix multiplications into lookups and additions, eliminating the need for multipliers entirely. We present Stella Nera, the first Maddness-based accelerator achieving an energy efficiency of 161 TOp/s/W@0.55V, 25x better than conventional MatMul accelerators due to its small components and reduced computational complexity. We further enhance Maddness with a differentiable approximation, allowing for gradient-based fine-tuning and achieving an end-to-end performance of 92.5% Top-1 accuracy on CIFAR-10.

Discussion (0). Continue with ORCID to comment.

Forward citations

Cited by 2 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Lookup Table-based Multiplication-free All-digital DNN Accelerator Featuring Self-Synchronous Pipeline Accumulation

    cs.AR 2025-06 conditional novelty 6.0 of 10

    An all-digital MADDNESS DNN accelerator macro using a self-synchronous pipeline and 10T-SRAM lookup tables achieves 174 TOPS/W and 2.01 TOPS/mm2 in 22nm post-layout simulation.

  2. LUT-DLA: Lookup Table as Efficient Extreme Low-Bit Deep Learning Accelerator

    cs.AR 2025-01 conditional novelty 5.0 of 10

    LUT-DLA converts neural network layers into vector-quantized lookup tables, claiming sub-1-bit-equivalent inference with 1.4-7.0x power and 1.5-146.1x area efficiency gains over conventional accelerators.

Pith tools