Machine Learning enables Design of On-chip Integrated Silicon T-junctions with footprint of 1.2 μm x 1.2 μm

To date, various optimization algorithms have been employed to design and improve the performance of nanophotonic structures. Here, we propose to utilize a machine-learning algorithm viz. binary-Additive Reinforcement Learning Algorithm (b-ARLA) coupled with finite-difference time-domain (FDTD) simulations to design ultra-compact and efficient on-chip integrated nanophotonic 50:50 beam splitters (T-junctions). Here we present the design of two T-junction splitters each with a footprint of only 1.2 $\mu$m x 1.2 $\mu$m. To the best of our knowledge, these designs are amongst the smallest ever reported till date across either simulations or experiments. The simulated net power transmission efficiency for the first T-junction design is ~ 82% and the second design is ~ 80% $at 4\lambda = 1.55 \mu$m. We envision that the design methodology, as reported herein, would be useful in general for designing any efficient integrated-photonic device for optical communications systems.