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Addition on a Quantum Computer
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A new method for computing sums on a quantum computer is introduced. This technique uses the quantum Fourier transform and reduces the number of qubits necessary for addition by removing the need for temporary carry bits. This approach also allows the addition of a classical number to a quantum superposition without encoding the classical number in the quantum register. This method also allows for massive parallelization in its execution.
Forward citations
Cited by 16 Pith papers
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Automatic quantum function parallelization and memory management in Qrisp
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Quantum Wave Atom Transforms
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A Quantum-Classical Surrogate Model for the Collision Operator of the Lattice Boltzmann Method
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Quantum-Accelerated Self-Consistent Field: A Hybrid Algorithm
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Efficient and Expressive Boundary Conditions in Quantum Lattice Boltzmann Methods
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A Quantum Algorithm with Polylogarithmic Depth per Trotter Step for the Extended Hubbard Model
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A Quantum Spectral Method for Non-Periodic Boundary Value Problems
Quantum spectral method solves non-periodic Dirichlet boundary value problems with polylogarithmic complexity by extending Fourier discretization with domain doubling, antisymmetric reflection, and quantum sine transform.
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Fullqubit alchemist: Quantum algorithm for alchemical free energy calculations
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On the practicality of quantum sieving algorithms for the shortest vector problem
Quantum sieving for SVP in dimension 400 needs ~10^13 physical qubits and ~10^31 years under optimistic assumptions, offering no practical speedup over classical methods.
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Analog photonic simulator for large-scale transport
Continuous-variable photonic platform with 20,000-mode cluster state simulates advection transport equation, achieving relative errors of 0.8% and 0.92% on first- and second-order moments via homodyne readout.
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Universal Matrix Multiplication on Quantum Computer
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Solving Einstein Field Equations on a Digital Quantum Computer
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Universal Quantum Computer Simulation of 50 Qubits on Europe`s First Exascale Supercomputer Harnessing Its Heterogeneous CPU-GPU Architecture
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