pith. sign in

arxiv: 2509.13247 · v2 · submitted 2025-09-16 · 🪐 quant-ph

Demonstration of a Logical Architecture Uniting Motion and In-Place Entanglement

Pith reviewed 2026-05-18 16:05 UTC · model grok-4.3

classification 🪐 quant-ph
keywords neutral atomslogical qubitsquantum error correctionatom rearrangementin-place entanglementShor's algorithm[[16,4,4]] codeCX ladders
0
0 comments X

The pith

Neutral-atom processors achieve lower logical overhead by integrating atom motion with in-place entanglement.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper establishes that a neutral atom architecture can combine physical atom rearrangements with entanglement gates performed at fixed locations to reduce the resources needed for logical quantum operations compared with designs that separate entanglement into dedicated zones. Experiments on a 114-qubit device implement a non-scalable Shor's algorithm variant, constant-depth logical CX ladders, and single-round decoding of the [[16,4,4]] code, reporting up to 2x lower total variation distance, 2-4x reduced error on the ladders, and an 8x logical-to-physical improvement. A reader would care because these concrete gains on current hardware point to a route for scaling logical qubits without the extra sites and transport steps required by zone-based approaches.

Core claim

The central claim is that uniting atom motion with in-place entanglement offers lower overhead than entangling-zone approaches, demonstrated on 114 qubits by a pre-compiled Shor's variant with up to 2x TVD reduction including loss correction, constant-depth logical CX ladders with 2-4x lower error for 8 and 12 logical qubits, and an 8x logical improvement on the [[16,4,4]] code after single-round post-processed decoding.

What carries the argument

The integrated logical architecture that interleaves atom rearrangements for positioning with in-place entangling gates executed on the same sites.

If this is right

  • Logical algorithms such as the Shor's variant exhibit improved performance when loss correction and leakage detection are included.
  • Constant-depth logical CX ladders maintain 2-4x error reduction even though current hardware implements them serially.
  • Single-round decoding of the [[16,4,4]] code produces an 8x logical versus physical fidelity gain.
  • The motion-inclusive design avoids the extra physical sites and transport overhead of zone-separated architectures.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • If the fidelity advantage persists under multi-round error correction, the approach could lower the physical-qubit count needed for fault-tolerant thresholds.
  • The same motion-plus-in-place pattern might be tested on other array platforms where transport is already used for routing.
  • Extending the CX-ladder experiments to larger depths would clarify whether the error scaling remains favorable beyond the reported 8-12 logical qubits.

Load-bearing premise

The hardware can execute the required atom rearrangements and in-place gates at the reported fidelities without hidden error sources that would remove the claimed overhead advantage when the system is scaled.

What would settle it

A direct comparison on the same device showing that total error or qubit overhead for equivalent logical tasks is higher when using motion plus in-place gates than when using a dedicated entangling zone.

Figures

Figures reproduced from arXiv: 2509.13247 by Alexander G. Radnaev, Anthony Reiter, Benjamin Hall, Bharath Thotakura, Brian Fields, Caitlin Carnahan, Cameron Barker, Daniel C. Cole, David Mason, David Owusu-Antwi, Ely Novakoski, Eric B. Jones, Farhad Majdeteimouri, Frederic T. Chong, Garrett T. Hickman, Ilya Vinogradov, Joshua Viszlai, Kevin Loeffler, Kevin W. Kuper, Mariesa H. Teo, Marin Iliev, Mark Saffman, Martin T. Lichtman, Matt Blakely, Matthew Gillette, Matt J. Bedalov, Nate Mackintosh, Palash Goiporia, Peter T. Mitchell, Pranav Gokhale, Rich Rines, Ryan A. Jones, Samuel Y. Eubanks, Stephanie Lee, Teague Tomesh, Thomas W. Noel, Tobias Bothwell, Victory Omole.

Figure 1
Figure 1. Figure 1: FIG. 1. (a) Sqale’s architecture, combining locally-addressed [PITH_FULL_IMAGE:figures/full_fig_p001_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: FIG. 2. Experimental results for all Shor circuits run on hard [PITH_FULL_IMAGE:figures/full_fig_p005_2.png] view at source ↗
Figure 4
Figure 4. Figure 4: FIG. 4. Logical circuit for a 5 CNOT, constant-depth CNOT [PITH_FULL_IMAGE:figures/full_fig_p006_4.png] view at source ↗
Figure 3
Figure 3. Figure 3: FIG. 3. An “outside-in” implementation of a CNOT-ladder [PITH_FULL_IMAGE:figures/full_fig_p006_3.png] view at source ↗
Figure 5
Figure 5. Figure 5: FIG. 5. Error rates with 68% confidence intervals for unen [PITH_FULL_IMAGE:figures/full_fig_p007_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: FIG. 6. Error rates with 68% confidence intervals for unen [PITH_FULL_IMAGE:figures/full_fig_p007_6.png] view at source ↗
Figure 7
Figure 7. Figure 7: FIG. 7 [PITH_FULL_IMAGE:figures/full_fig_p008_7.png] view at source ↗
Figure 9
Figure 9. Figure 9: FIG. 9. Dominant time cost of a gate layer involving a [PITH_FULL_IMAGE:figures/full_fig_p009_9.png] view at source ↗
Figure 11
Figure 11. Figure 11: FIG. 11. Simulations of 8 LQ and 12 LQ CDCX circuits while [PITH_FULL_IMAGE:figures/full_fig_p012_11.png] view at source ↗
Figure 10
Figure 10. Figure 10: FIG. 10. Noisy simulation results for all executed Shor cir [PITH_FULL_IMAGE:figures/full_fig_p012_10.png] view at source ↗
Figure 12
Figure 12. Figure 12: FIG. 12. Simulated proportion of shots discarded for 8 LQ [PITH_FULL_IMAGE:figures/full_fig_p013_12.png] view at source ↗
Figure 13
Figure 13. Figure 13: FIG. 13. Scaling of (top) estimated pseudothreshold (error [PITH_FULL_IMAGE:figures/full_fig_p013_13.png] view at source ↗
Figure 14
Figure 14. Figure 14: FIG. 14. Noisy error rate simulations of [[16, 4, 4]] state [PITH_FULL_IMAGE:figures/full_fig_p013_14.png] view at source ↗
Figure 15
Figure 15. Figure 15: FIG. 15. Arbitrary-length logical constant-depth CNOT lad [PITH_FULL_IMAGE:figures/full_fig_p014_15.png] view at source ↗
Figure 16
Figure 16. Figure 16: FIG. 16. Updated experimental results for Shor circuits after [PITH_FULL_IMAGE:figures/full_fig_p015_16.png] view at source ↗
read the original abstract

We demonstrate a logical neutral atom architecture that integrates atom motion with in-place entanglement to achieve lower overheads than entangling-zone approaches. Using a 114-qubit device, we perform three proof-of-principle logical-qubit experiments. First, we implement a pre-compiled, non-scalable variant of Shor's algorithm, observing improved logical-over-physical performance, including with loss correction and leakage detection, achieving up to a 2x reduction in TVD. Second, we construct constant-depth logical CX ladders; on current hardware these execute with serial entangling operations, yet still yield 2-4x lower error for 8 and 12 logical qubits. Third, we prepare the [[16,4,4]] code and perform single-round decoding with post-processed error correction, achieving 8x improvement on logical vs physical. These results demonstrate how combining motion with in-place entanglement offers lower overhead than entangling-zone approaches.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

1 major / 2 minor

Summary. The manuscript demonstrates a logical neutral atom architecture on a 114-qubit device that integrates atom motion with in-place entanglement. It reports three proof-of-principle experiments claiming lower overhead than entangling-zone approaches: (1) a pre-compiled non-scalable Shor's algorithm variant with loss correction and leakage detection yielding up to 2x TVD reduction; (2) constant-depth logical CX ladders on 8 and 12 logical qubits with 2-4x lower error despite serial entangling operations; (3) preparation of the [[16,4,4]] code with single-round post-processed decoding achieving 8x logical vs. physical improvement.

Significance. If the results and comparisons hold under direct hardware controls, the work would be significant for neutral-atom quantum computing by providing experimental evidence that combining motion and in-place gates can reduce overhead for logical operations relative to zone-based methods, with potential implications for scalable error correction.

major comments (1)
  1. Abstract and experimental sections: the overhead advantage is asserted by comparing against prior literature values or idealized entangling-zone models rather than executing an equivalent entangling-zone protocol on the same 114-qubit array under identical calibration, rearrangement, and noise conditions. Hardware-specific factors (rearrangement fidelity, loss/leakage rates) could account for the reported 2x TVD reduction, 2-4x CX error improvement, and 8x logical gain without validating architectural superiority.
minor comments (2)
  1. Provide full methods, complete error budgets, and raw data (or access to them) so that post-selection and post-processing effects on the reported gains can be independently verified.
  2. Clarify the distinction between the non-scalable pre-compiled Shor's variant and any scalable implementation path, including how motion and in-place gates would extend to larger instances.

Simulated Author's Rebuttal

1 responses · 0 unresolved

We thank the referee for the thorough review and valuable feedback on our manuscript. We have addressed the major comment below by agreeing to revise the abstract, experimental sections, and discussion to more precisely characterize our comparisons, while maintaining the core claims supported by the experimental data.

read point-by-point responses
  1. Referee: Abstract and experimental sections: the overhead advantage is asserted by comparing against prior literature values or idealized entangling-zone models rather than executing an equivalent entangling-zone protocol on the same 114-qubit array under identical calibration, rearrangement, and noise conditions. Hardware-specific factors (rearrangement fidelity, loss/leakage rates) could account for the reported 2x TVD reduction, 2-4x CX error improvement, and 8x logical gain without validating architectural superiority.

    Authors: We agree that performing an equivalent entangling-zone protocol on the identical 114-qubit array under the same calibration and noise conditions would constitute the most direct validation. Our manuscript instead benchmarks against published results from comparable neutral-atom platforms and idealized zone-based models because the integrated motion-plus-in-place architecture enables specific protocols (e.g., constant-depth logical CX ladders on 8–12 logical qubits and the [[16,4,4]] preparation) whose overhead scaling differs fundamentally from zone-based designs. Hardware-specific factors such as rearrangement fidelity and loss rates are already quantified and corrected for in our data (via loss correction and leakage detection in the Shor experiment and post-selection in the code experiment). To strengthen the presentation, we will revise the abstract and add a new paragraph in the discussion that (i) explicitly states the comparison basis, (ii) acknowledges the absence of a same-device control experiment, and (iii) outlines why such a control is technically non-trivial given the distinct gate-zone requirements. These changes will be partial, preserving the experimental results while improving clarity on the scope of the architectural claim. revision: partial

Circularity Check

0 steps flagged

Experimental demonstrations with no derivation chain

full rationale

The manuscript reports hardware experiments on a 114-qubit neutral-atom array implementing logical operations via atom motion plus in-place gates. All three results (Shor variant, CX ladders, [[16,4,4]] code) are direct measurements of TVD, error rates, and logical improvement; none invoke equations, fitted parameters, or first-principles derivations that could reduce to their own inputs. Comparisons are made to external literature or idealized zone models rather than internal self-referential constructions. No self-citation load-bearing theorems, ansatz smuggling, or renaming of known results appear in the provided text. The work is therefore self-contained empirical content with independent falsifiable outputs.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Paper is an experimental demonstration on existing neutral-atom hardware; relies on standard quantum error correction assumptions and device calibration rather than new axioms or invented entities.

pith-pipeline@v0.9.0 · 5864 in / 1043 out tokens · 34819 ms · 2026-05-18T16:05:14.470795+00:00 · methodology

discussion (0)

Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.

Lean theorems connected to this paper

Citations machine-checked in the Pith Canon. Every link opens the source theorem in the public Lean library.

What do these tags mean?
matches
The paper's claim is directly supported by a theorem in the formal canon.
supports
The theorem supports part of the paper's argument, but the paper may add assumptions or extra steps.
extends
The paper goes beyond the formal theorem; the theorem is a base layer rather than the whole result.
uses
The paper appears to rely on the theorem as machinery.
contradicts
The paper's claim conflicts with a theorem or certificate in the canon.
unclear
Pith found a possible connection, but the passage is too broad, indirect, or ambiguous to say the theorem truly supports the claim.

Forward citations

Cited by 8 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score.

  1. Logical Compilation for Multi-Qubit Iceberg Patches

    quant-ph 2026-04 unverdicted novelty 8.0

    A new heuristic compiler for multi-qubit iceberg patches reduces circuit depth by 34 percent, cuts gate counts, and improves fidelity metrics on 71 benchmarks compared with naive mapping.

  2. High-fidelity entangling gates and nonlocal circuits with neutral atoms

    quant-ph 2026-04 conditional novelty 6.0

    Neutral-atom system delivers state-of-the-art CZ gate fidelity of 99.854% (99.941% postselected) and demonstrates coherent rearrangement for nonlocal quantum circuits.

  3. Loss-biased fault-tolerant quantum error correction

    quant-ph 2026-04 unverdicted novelty 6.0

    Loss biasing turns Rydberg errors into erasures in neutral-atom QEC, restoring fault-tolerant Pauli error scaling and enabling optimal erasure scaling with loss-aware decoding for shorter cycles.

  4. Co-Designing Error Mitigation and Error Detection for Logical Qubits

    quant-ph 2026-04 unverdicted novelty 6.0

    Optimized QED intervals plus steady-state extraction enable PEC+QED to deliver 2-11x lower error than PEC alone on Iceberg codes for QAOA.

  5. Fast measurement of neutral atoms with a multi-atom gate

    quant-ph 2026-04 unverdicted novelty 6.0

    A multi-atom Rydberg gate with N ancillae enables N-fold photon collection for fast neutral-atom measurement, achieving infidelity below 10^{-3} in 6 μs with N=5 in Cs-Rb simulations.

  6. Square-root Time Atom Reconfiguration Plan for Lattice-shaped Mobile Tweezers

    quant-ph 2026-04 conditional novelty 6.0

    A divide-and-conquer algorithm decomposes atom reconfiguration into three 1D shuttling tasks, enabling O(sqrt N) total transportation cost and reliable solutions via the Gale-Ryser theorem for arbitrary geometries.

  7. Multiqubit Rydberg Gates for Quantum Error Correction

    quant-ph 2025-11 unverdicted novelty 6.0

    Global multiqubit Rydberg gates enable break-even measurement-free QEC and lower-shuttling Floquet codes in neutral-atom hardware.

  8. Benchmarking a machine-learning differential equations solver on a neutral-atom logical processor

    quant-ph 2026-05 unverdicted novelty 4.0

    Logical quantum kernels outperform physical ones when solving differential equations on a neutral-atom processor, with gains traced to noise error detection in the logical encoding.

Reference graph

Works this paper leans on

48 extracted references · 48 canonical work pages · cited by 8 Pith papers · 2 internal anchors

  1. [1]

    Any non-Clifford op- eration is replaced with its Pauli Twirling approximation

    relied primarily on density matrix simulation, the cur- rent implementation achieves greater efficiency by sim- ulating operations that only affect the qubit subspace through a Clifford-only simulator. Any non-Clifford op- eration is replaced with its Pauli Twirling approximation. Transitions in and out of the qubit subspace are tracked using a classical ...

  2. [2]

    outside- in

    All results are post-selected on atom loss (see Section IX D for results with loss correction post-processing in- stead). The three encoded implementations are addition- ally post-selected on flag qubits for their|00⟩ L prepara- tion and the parity of the measured data qubits, as well as (in the case of the leakage-detecting circuit) the mea- sured state ...

  3. [3]

    correcting

    Because of this entanglement, it is as if the targets of the first CNOT pair (of the second section of Figure 4) were ap- plied not on the ancilla row, but the second data row, before the targets of the second CNOT pair. The catch is that this is only true if the ancilla row is measured to be|00⟩. If it is not, one could imagine that it would have been ha...

  4. [4]

    However depending on how much atom movement is needed, a logical gate layer can bemeasurement-bottleneckedormovement- bottlenecked

    Movement Operations For general CSS codes of arbitrary distanced, we can implement constant-depth logical circuits using transver- sal CNOTs and atom movement. However depending on how much atom movement is needed, a logical gate layer can bemeasurement-bottleneckedormovement- bottlenecked. We argue that for any relevant code 5 10 15 20 25 Code Distance 1...

  5. [5]

    In contrast, transversal gates can requireO(1) syndrome measurement rounds so long as proper decoding tech- niques are used [37, 38]

    Syndrome Decoding Code deformation techniques for performing logic [34– 36] require a number of syndrome measurement rounds scaling asO(d) to handle measurement errors properly. In contrast, transversal gates can requireO(1) syndrome measurement rounds so long as proper decoding tech- niques are used [37, 38]. These decoding techniques, how- ever, require...

  6. [6]

    Shor We investigated the impact and sensitivity of hard- ware noise further for the circuits in section III by em- ploying noise scaling analysis to discover their pseudo- thresholding behavior (see Fig. 10). We identified the error sources in Sqalesim most likely to have higher hard- ware drift and scaled them by a multiplicative factorα (where the defau...

  7. [7]

    Constant-depth CNOT ladder We study the simulated performance of constant-depth CNOT (CDCX) ladder circuits as we scale the noise pa- rameters by a constant factor from 0.1×to 10×. Due to the number of shots required (>5×10 5 for higher scaling factors), these simulations reflect results for a specific ini- tial bitstring for each CDCX size – initial simu...

  8. [8]

    The qubits with/without a Hadamard applied at the start are an- cilla/data qubits, respectively

    of the measured ancilla bits above it with an⊕is 1. The qubits with/without a Hadamard applied at the start are an- cilla/data qubits, respectively. D. Shor Loss Correction Results As discussed in section II C, an additional tool we have in our logical encoding toolkit is that of loss correction. While the circuits executed in section III do not explicitl...

  9. [9]

    Bluvstein, H

    D. Bluvstein, H. Levine, G. Semeghini, T. T. Wang, S. Ebadi, M. Kalinowski, A. Keesling, N. Maskara, H. Pichler, M. Greiner, V. Vuleti´ c, and M. D. Lukin, A quantum processor based on coherent transport of en- tangled atom arrays, Nature604, 451–456 (2022)

  10. [10]

    Suppressing quantum errors by scaling a surface code log- ical qubit, Nature614, 676 (2023)

  11. [11]

    Demonstration of logical qubits and repeated error correction with better-than-physical error rates

    A. Paetznick, M. da Silva, C. Ryan-Anderson, J. Bello- Rivas, J. Campora III, A. Chernoguzov, J. Dreiling, C. Foltz, F. Frachon, J. Gaebler,et al., Demonstra- tion of logical qubits and repeated error correction with better-than-physical error rates, arXiv preprint arXiv:2404.02280 (2024)

  12. [12]

    Bedalov, M

    M. Bedalov, M. Blakely, P. Buttler, C. Carnahan, F. T. Chong, W. C. Chung, D. C. Cole, P. Goiporia, P. Gokhale, B. Heim,et al., Fault-tolerant operation and materials science with neutral atom logical qubits, arXiv preprint arXiv:2412.07670 (2024)

  13. [13]

    P. S. Rodriguez, J. M. Robinson, P. N. Jepsen, Z. He, C. Duckering, C. Zhao, K.-H. Wu, J. Campo, K. Bag- nall, M. Kwon, T. Karolyshyn, P. Weinberg, M. Cain, S. J. Evered, A. A. Geim, M. Kalinowski, S. H. Li, T. Manovitz, J. Amato-Grill, J. I. Basham, L. Bern- stein, B. Braverman, A. Bylinskii, A. Choukri, R. DeAn- gelo, F. Fang, C. Fieweger, P. Frederick,...

  14. [14]

    B. W. Reichardt, D. Aasen, R. Chao, A. Chernoguzov, W. van Dam, J. P. Gaebler, D. Gresh, D. Lucchetti, M. Mills, S. A. Moses,et al., Demonstration of quan- tum computation and error correction with a tesseract code, arXiv preprint arXiv:2409.04628 (2024)

  15. [15]

    Bluvstein, A

    D. Bluvstein, S. J. Evered, A. A. Geim, S. H. Li, H. Zhou, T. Manovitz, S. Ebadi, M. Cain, M. Kalinowski, D. Hangleiter,et al., Architectural mechanisms of a uni- versal fault-tolerant quantum computer, arXiv preprint arXiv:2506.20661 (2025)

  16. [16]

    Bluvstein, S

    D. Bluvstein, S. J. Evered, A. A. Geim, S. H. Li, H. Zhou, T. Manovitz, S. Ebadi, M. Cain, M. Kalinowski, D. Hangleiter,et al., Logical quantum processor based on reconfigurable atom arrays, Nature626, 58 (2024)

  17. [17]

    Sunami, G

    S. Sunami, G. Akihisa, and Y. Hayata, Transversal surface-code game powered by neutral atoms, arXiv preprint arXiv:2506.18979 (2025)

  18. [18]

    Chinnarasu, C

    R. Chinnarasu, C. Poole, L. Phuttitarn, A. Noori, T. M. Graham, S. N. Coppersmith, A. B. Balantekin, and M. Saffman, Variational simulation of the Lipkin- Meshkov-Glick model on a neutral atom quantum com- puter, PRX Quantum6, 020350 (2025)

  19. [19]

    J. A. Smolin, G. Smith, and A. Vargo, Oversimplifying quantum factoring, Nature499, 163 (2013)

  20. [20]

    Goto, High-performance fault-tolerant quantum com- puting with many-hypercube codes, Science Advances 10, eadp6388 (2024)

    H. Goto, High-performance fault-tolerant quantum com- puting with many-hypercube codes, Science Advances 10, eadp6388 (2024)

  21. [21]

    E. B. Jones, C. J. Winkleblack, C. Campbell, C. Rotello, E. D. Dahl, M. Reynolds, P. Graf, and W. Jones, Dy- namic, symmetry-preserving, and hardware-adaptable circuits for quantum computing many-body states and correlators of the anderson impurity model, arXiv preprint arXiv:2405.15069 (2024)

  22. [22]

    B¨ aumer and S

    E. B¨ aumer and S. Woerner, Measurement-based long- range entangling gates in constant depth, Phys. Rev. Res. 7, 023120 (2025)

  23. [23]

    Litinski, Blocklet concatenation: Low-overhead fault- tolerant protocols for fusion-based quantum computation (2025), arXiv:2506.13619 [quant-ph]

    D. Litinski, Blocklet concatenation: Low-overhead fault- tolerant protocols for fusion-based quantum computa- tion, arXiv preprint arXiv:2506.13619 (2025)

  24. [24]

    Radnaev, W

    A. Radnaev, W. Chung, D. Cole, D. Mason, T. Bal- lance, M. Bedalov, D. Belknap, M. Berman, M. Blakely, I. Bloomfield, P. Buttler, C. Campbell, A. Chopinaud, E. Copenhaver, M. Dawes, S. Eubanks, A. Friss, D. Gar- cia, J. Gilbert, M. Gillette, P. Goiporia, P. Gokhale, J. Goldwin, D. Goodwin, T. Graham, C. Guttormsson, G. Hickman, L. Hurtley, M. Iliev, E. Jo...

  25. [25]

    Campbell, F

    C. Campbell, F. T. Chong, D. Dahl, P. Frederick, P. Goiporia, P. Gokhale, B. Hall, S. Issa, E. Jones, S. Lee, et al., Superstaq: Deep optimization of quantum pro- grams, in2023 IEEE International Conference on Quan- tum Computing and Engineering (QCE), Vol. 1 (IEEE,

  26. [26]

    Yoshida, S

    S. Yoshida, S. Tamiya, and H. Yamasaki, Concatenate codes, save qubits, npj Quantum Information11, 88 (2025)

  27. [27]

    Stricker, D

    R. Stricker, D. Vodola, A. Erhard, L. Postler, M. Meth, M. Ringbauer, P. Schindler, T. Monz, M. M¨ uller, and R. Blatt, Experimental deterministic correction of qubit loss, Nature585, 207 (2020)

  28. [28]

    B. W. Reichardt, A. Paetznick, D. Aasen, I. Basov, J. M. Bello-Rivas, P. Bonderson, R. Chao, W. van Dam, M. B. Hastings, R. V. Mishmash,et al., Fault-tolerant quan- tum computation with a neutral atom processor, arXiv preprint arXiv:2411.11822 (2024)

  29. [29]

    et al., Leveraging Atom Loss Errors in Fault Tolerant Quantum Algorithms, arXiv (2025), 2502.20558 [quant-ph]

    G. Baranes, M. Cain, J. Ataides, D. Bluvstein, J. Sinclair, V. Vuletic, H. Zhou, and M. D. Lukin, Leveraging atom loss errors in fault tolerant quantum algorithms, arXiv preprint arXiv:2502.20558 (2025)

  30. [30]

    Zhang, G

    B. Zhang, G. Liu, G. Bornet, S. P. Horvath, P. Peng, S. Ma, S. Huang, S. Puri, and J. D. Thompson, Leverag- ing erasure errors in logical qubits with metastable 171yb atoms (2025), arXiv:2506.13724 [quant-ph]

  31. [31]

    Preskill, Reliable quantum computers, Proc

    J. Preskill, Reliable quantum computers, Proc. R. Soc. Lond. A454, 385 (1998)

  32. [32]

    M. N. H. Chow, V. Buchemmavari, S. Omanakuttan, B. J. Little, S. Pandey, I. H. Deutsch, and Y.-Y. Jau, 17 Circuit-based leakage-to-erasure conversion in a neutral- atom quantum processor, PRX Quantum5, 040343 (2024)

  33. [33]

    I. Cong, H. Levine, A. Keesling, D. Bluvstein, S.- T. Wang, and M. D. Lukin, Hardware-efficient, fault- tolerant quantum computation with rydberg atoms, Physical Review X12, 021049 (2022)

  34. [34]

    Fold-transversal surface code cultivation.arXiv preprint arXiv:2509.05212, 2025

    K. Sahay, P.-K. Tsai, K. Chang, Q. Su, T. B. Smith, S. Singh, and S. Puri, Fold-transversal surface code cul- tivation (2025), arXiv:2509.05212 [quant-ph]

  35. [35]

    P. W. Shor, Algorithms for quantum computation: dis- crete logarithms and factoring, inProceedings 35th an- nual symposium on foundations of computer science (Ieee, 1994) pp. 124–134

  36. [36]

    B¨ aumer, V

    E. B¨ aumer, V. Tripathi, D. S. Wang, P. Rall, E. H. Chen, S. Majumder, A. Seif, and Z. K. Minev, Efficient long- range entanglement using dynamic circuits, PRX Quan- tum5, 030339 (2024)

  37. [37]

    Hashim, M

    A. Hashim, M. Yuan, P. Gokhale, L. Chen, C. Juenger, N. Fruitwala, Y. Xu, G. Huang, K. Nowrouzi, L. Jiang, et al., Efficient generation of multi-partite entanglement between non-local superconducting qubits using classical feedback, arXiv preprint arXiv:2403.18768 (2024)

  38. [38]

    Temme, S

    K. Temme, S. Bravyi, and J. M. Gambetta, Error miti- gation for short-depth quantum circuits, Physical review letters119, 180509 (2017)

  39. [39]

    Saffman, Quantum computing with neutral atoms, National Science Review6, 24 (2019)

    M. Saffman, Quantum computing with neutral atoms, National Science Review6, 24 (2019)

  40. [40]

    M. A. Perlin, qLDPC,https://github.com/qLDPCOrg/ qLDPC(2023)

  41. [41]

    Zheng, C.-Y

    Y.-C. Zheng, C.-Y. Lai, T. A. Brun, and L.-C. Kwek, Constant depth fault-tolerant clifford circuits for multi- qubit large block codes, Quantum Science and Technol- ogy5, 045007 (2020)

  42. [42]

    Universal adapters between quantum LDPC codes,

    E. Swaroop, T. Jochym-O’Connor, and T. J. Yoder, Universal adapters between quantum ldpc codes, arXiv preprint arXiv:2410.03628 (2024)

  43. [43]

    L. Z. Cohen, I. H. Kim, S. D. Bartlett, and B. J. Brown, Low-overhead fault-tolerant quantum computing using long-range connectivity, Science Advances8, eabn1717 (2022)

  44. [44]

    Horsman, A

    D. Horsman, A. G. Fowler, S. Devitt, and R. Van Meter, Surface code quantum computing by lattice surgery, New Journal of Physics14, 123011 (2012)

  45. [45]

    H. Zhou, C. Zhao, M. Cain, D. Bluvstein, C. Ducker- ing, H.-Y. Hu, S.-T. Wang, A. Kubica, and M. D. Lukin, Algorithmic fault tolerance for fast quantum computing, arXiv:2406.17653 (2024)

  46. [46]

    Decoding across transversal clifford gates in the surface code

    M. Serra-Peralta, M. H. Shaw, and B. M. Terhal, Decod- ing across transversal Clifford gates in the surface code, arXiv preprint arXiv:2505.13599 (2025)

  47. [47]

    C. Fang, J. Miles, J. Goldwin, M. Lichtman, M. Gillette, M. Bergdolt, S. Deshpande, S. A. Norrell, P. Huft, M. A. Kats, and M. Saffman, Interleaved dual-species arrays of single atoms using a passive optical element and one trapping laser, Science Advances11, eadw4166 (2025)

  48. [48]

    Saffman, Quantum computing with atomic qubit ar- rays: confronting the cost of connectivity, arXiv preprint arXiv:2505.11218 (2025)

    M. Saffman, Quantum computing with atomic qubit ar- rays: confronting the cost of connectivity, arXiv preprint arXiv:2505.11218 (2025)