GreenPeas: Unlocking Adaptive Quantum Error Correction with Just-in-Time Decoding Hypergraphs

Abbas B. Ziad, Hongxiang Fan, Jubo Xu

Pith reviewed 2026-05-10 08:37 UTC · model grok-4.3

classification 🪐 quant-ph cs.DC

keywords adaptivecircuithypergraphsdecodinggreenpeasacrossarchitecturescircuit-level

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The pith

GreenPeas delivers a just-in-time GPU compiler for decoding hypergraphs that achieves >10x speedup on surface and bivariate bicycle codes, unlocking circuit-level decoding for adaptive quantum error correction.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

Quantum computers must correct errors in real time, but adaptive circuits change their structure based on mid-run measurements. Pre-building every possible error graph for all branches would require impossible amounts of memory. GreenPeas solves this by turning the circuit into a space-time error graph on the fly and running a parallel version of Stim's backtracking algorithm across thousands of GPU threads. The workload for n qubits and l layers is split so many threads work at once. On standard surface and bivariate bicycle codes the tool runs more than ten times faster than the usual pre-compiled approach. Because the graphs are built only when needed, detailed circuit-level decoding becomes practical for these changing circuits instead of using simpler but less accurate phenomenological models.

Core claim

Our implementation achieves a greater than 10x average speedup over the Stim baseline across two of the leading fault-tolerant architectures: the surface and bivariate bicycle codes. As a key use case, we demonstrate that this speedup enables circuit-level decoding of adaptive syndrome measurement circuits, unlocking a regime previously restricted to less accurate phenomenological decoders.

Load-bearing premise

That the just-in-time GPU mapping of Stim's backtracking algorithm preserves numerical correctness and that the compilation latency remains small enough not to dominate the overall decoding time in realistic adaptive workloads.

Figures

Figures reproduced from arXiv: 2604.16613 by Abbas B. Ziad, Hongxiang Fan, Jubo Xu.

**Figure 1.** Figure 1: Error analysis. (a) The SM circuit for a distance 3 repetition code (two rounds). We show four detectors, coloured orange, blue, green and yellow. The orange (green) detector is defined by the first measurement of ancilla qubit 0 (1). The blue (yellow) detector is defined by the parity of the measurements of ancilla qubit 0 (1). The challenge of error analysis is to find the set of detectors flipped by eac… view at source ↗

**Figure 2.** Figure 2: Positioning GreenPeas. The DEM serves as a universal IR for targeting various decoder architectures. Depending on the use case, viz. static vs. dynamic, either Stim or GreenPeas, respectively, can be used to compile the DEM before lowering to a target backend. 4 Performance Evaluation We perform standard Z-basis memory experiments using the surface and bivariate bicycle codes, two of the leading code fami… view at source ↗

**Figure 3.** Figure 3: Compilation latency scaling. Mean compilation time per round versus code distance 𝑑 for surface codes (left) and bivariate bicycle codes (right). Top panels show the Stim baseline, while bottom panels display GreenPeas performance across correlation levels 𝐿0 − 𝐿2 and GPU architectures (Ampere, Blackwell). Results are averaged over 10, 000 runs per circuit at a physical error rate of 𝑝 = 0.1%; latency was … view at source ↗

**Figure 4.** Figure 4: Decoding accuracy and latency scaling. Logical error rate (top) and mean decoding time (bottom) per round versus code distance 𝑑 for surface codes (left) and bivariate bicycle codes (right). Results are obtained using the Tesseract decoder with decoding hypergraphs compiled by GreenPeas (𝐿0-𝐿2) and Stim. The physical error rate 𝑝 = 0.1% in all cases. Top: Each data point represents 20 million samples; erro… view at source ↗

**Figure 5.** Figure 5: Adaptive code concatenation. A surface code (top) implemented via concatenation with an array of Iceberg codes (bottom). Data qubits in the surface code (orange) map to logical operators within the Iceberg blocks. For example, data qubits 0 and 14 correspond to the first and second logical operators of the leading block, respectively. An initial error detection cycle measures the checks (green) of all Iceb… view at source ↗

**Figure 6.** Figure 6: Comparison of static and adaptive SM circuits. [PITH_FULL_IMAGE:figures/full_fig_p010_6.png] view at source ↗

read the original abstract

Circuit-level decoders are essential for the realisation of low-overhead fault-tolerant quantum computing. However, they rely on complex hypergraphs that are traditionally compiled ahead-of-time. This static approach introduces a significant bottleneck for an emerging class of adaptive circuits, where the structure is modified during execution based on mid-circuit measurement outcomes. Pre-compiling hypergraphs for all possible circuit branches would incur an exponential memory cost, rendering current tools impractical for these workloads. Hence, we introduce GreenPeas, a C++/CUDA toolchain for the high-speed, just-in-time compilation of decoding hypergraphs. By lowering the circuit to a space-time error propagation graph, we show how Stim's backtracking algorithm can be mapped efficiently onto massively parallel GPU architectures, decomposing the O(nl) workload for a circuit with n qubits and l gate layers across thousands of concurrent threads. Our implementation achieves a greater than 10x average speedup over the Stim baseline across two of the leading fault-tolerant architectures: the surface and bivariate bicycle codes. As a key use case, we demonstrate that this speedup enables circuit-level decoding of adaptive syndrome measurement circuits, unlocking a regime previously restricted to less accurate phenomenological decoders. We aim to open-source GreenPeas to support the research of future adaptive circuit protocols.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Desk Editor's Note private letter to a colleague

GreenPeas delivers a practical GPU JIT for hypergraph compilation in adaptive circuits with reported 10x speedups, but the parallel backtracking needs explicit checks for exact equivalence to Stim.

read the letter

The main point is that this paper presents GreenPeas, a C++/CUDA toolchain that compiles space-time error hypergraphs just-in-time for adaptive quantum circuits instead of precomputing all branches. It claims more than 10x average speedup over Stim on surface and bivariate bicycle codes, which then makes circuit-level decoding feasible for adaptive syndrome measurements where only phenomenological decoders were practical before. That is the concrete advance. What is new is the decomposition of Stim's O(nl) backtracking across GPU threads so that measurement-dependent branches do not force exponential memory use. The work does well by identifying a genuine engineering limit in moving from static to adaptive fault tolerance and by showing measurable runtime gains on two leading code families. The implementation focus and the promise to open-source the code are also positive. The soft spot is verification of numerical identity. The stress-test concern holds: adaptive circuits introduce data-dependent paths, and any thread-scheduling difference, incomplete Pauli correlation propagation, or floating-point discrepancy could silently alter the hypergraph edges or weights fed to the decoder. The abstract gives performance numbers but no direct comparison of generated hypergraphs, no error bars on the speedup, and no mention of test cases that confirm the GPU output matches the CPU baseline exactly. If the full paper supplies those checks and the code, the claims become much stronger; without them the speedup is hard to evaluate on its own terms. This paper is for people who build or simulate fault-tolerant hardware and need faster tools for dynamic circuits. A reader working on decoder implementations or adaptive protocols would get direct value from the toolchain once released. It deserves peer review because the problem is real, the approach is falsifiable, and the reported gains are large enough to matter if they hold up under scrutiny. I would send it to referees with a request for explicit equivalence tests and benchmark details.

Axiom & Free-Parameter Ledger

0 free parameters · 2 axioms · 1 invented entities

The contribution is a new software implementation. No numerical free parameters are mentioned. The main assumptions are standard in quantum error correction and GPU programming; the central new entity is the GreenPeas toolchain itself.

axioms (2)

domain assumption Stim's backtracking algorithm can be mapped efficiently to massively parallel GPU threads without loss of correctness
Invoked when the paper describes lowering the circuit to a space-time graph and decomposing the O(nl) workload.
domain assumption The space-time error propagation graph accurately captures error behavior for the surface and bivariate bicycle codes under the models considered
Standard modeling step in circuit-level decoding.

invented entities (1)

GreenPeas C++/CUDA toolchain no independent evidence
purpose: High-speed just-in-time compilation of decoding hypergraphs for adaptive circuits
New software artifact introduced to avoid exponential pre-compilation memory cost.

pith-pipeline@v0.9.0 · 5529 in / 1452 out tokens · 55228 ms · 2026-05-10T08:37:02.514196+00:00 · methodology

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Reference graph

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